---
title: "Machine cycles involved in LDA"
subject: "Microprocessor"
chapter: 2
key: "semester_4/microprocessor:machine-cycles-lda"
source: https://www.bctengineer.com/q/semester_4/microprocessor/machine-cycles-lda
site: BCT Engineering
---

# Machine cycles involved in LDA

Microprocessor · Chapter 2: Programming with 8085 Microprocessor

- Asked in: 2070 Bhadra, 3 marks; 2069 Poush, 3 marks (asked 2 times)
- Video: [Timing Diagram of LDA Instruction in 8085 Microprocessor  | Timing Diagram](https://www.youtube.com/watch?v=euRRcFmN8nQ) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/microprocessor/machine-cycles-lda
- Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-2

## Question

Write the various machine cycles involved in LDA C030 stored at C050. (Similar: various machine cycles involved in LDA 8050H instruction stored at memory location 8020H.)

## Short answer

LDA C030H has four machine cycles and 13 T-states: opcode fetch at C050H, then memory reads at C051H, C052H, and C030H to get low address, high address, and data. The accumulator gets the byte from C030H and PC becomes C053H.

## Answer

`LDA C030H` (opcode 3AH) loads the accumulator with the byte at address C030H. It is a 3-byte instruction stored at C050H (3AH), C051H (30H), C052H (C0H). It has **four machine cycles** and **13 T-states**.

| Machine cycle | Type | Address | Operation | T-states |
|---|---|---|---|---|
| M1 | Opcode fetch | C050H | Read opcode 3AH into IR, decode | 4 |
| M2 | Memory read | C051H | Read low-order address byte 30H into Z | 3 |
| M3 | Memory read | C052H | Read high-order address byte C0H into W | 3 |
| M4 | Memory read | C030H (WZ) | Read data from C030H into A | 3 |

Total = 4 + 3 + 3 + 3 = 13 T-states. PC = C053H after the instruction.

Bus status for each cycle:

| M-cycle | T | A15-A8 | AD7-AD0 | ALE | Control | IO/M S1 S0 |
|---|---|---|---|---|---|---|
| **M1 (opcode fetch, 4T)** | T1 | C0H | 50H (PCL) | 1 | - | 0 1 1 |
|  | T2 | C0H | Hi-Z (bus floats) | 0 | RD low | 0 1 1 |
|  | T3 | C0H | 3AH (opcode in) | 0 | RD low, rises at end | 0 1 1 |
|  | T4 | - | - | 0 | none (decode) | 0 1 1 |
| **M2 (memory read, 3T)** | T1 | C0H | 51H | 1 | - | 0 1 0 |
|  | T2 | C0H | Hi-Z (bus floats) | 0 | RD low | 0 1 0 |
|  | T3 | C0H | 30H (data in) | 0 | RD low, rises at end | 0 1 0 |
| **M3 (memory read, 3T)** | T1 | C0H | 52H | 1 | - | 0 1 0 |
|  | T2 | C0H | Hi-Z (bus floats) | 0 | RD low | 0 1 0 |
|  | T3 | C0H | C0H (data in) | 0 | RD low, rises at end | 0 1 0 |
| **M4 (memory read, 3T)** | T1 | C0H | 30H | 1 | - | 0 1 0 |
|  | T2 | C0H | Hi-Z (bus floats) | 0 | RD low | 0 1 0 |
|  | T3 | C0H | data (data in) | 0 | RD low, rises at end | 0 1 0 |

The first three cycles are the fetch of the instruction (opcode and operand address); the fourth cycle is the execution (reading the data byte).

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. LDA C030H is stored at C050H. What does the CPU read in M2, from C051H?
   A. 30H, the low-order address byte, into the Z register
   B. C0H, the high-order address byte, into the W register
   C. The data byte at C030H, into the accumulator
   D. The opcode 3AH, into the instruction register
   Answer: A. The 16-bit address is stored low byte first, so C051H holds 30H. It is read into Z in M2, and C0H is read into W in M3. (Key point: LDA M2 reads the low-order address byte into Z)

2. How many machine cycles and T-states does LDA C030H take?
   A. 3 machine cycles, 10 T-states
   B. 4 machine cycles, 13 T-states
   C. 4 machine cycles, 16 T-states
   D. 3 machine cycles, 13 T-states
   Answer: B. LDA has an opcode fetch (4T) and three memory reads (3T each): the low address byte, the high address byte, and the data. That gives 4 + 3 + 3 + 3 = 13 T-states. (Key point: LDA has 4 machine cycles and 13 T-states)

3. During M4 of LDA C030H (stored at C050H), which address does the CPU put on the address bus?
   A. C053H, the next value of PC
   B. C052H, the last byte of the instruction
   C. C030H, taken from the W and Z registers
   D. C050H, the address of the opcode
   Answer: C. M4 is the execution cycle. The address assembled in WZ (C030H) goes out on the bus, and the data at that location is read into A. (Key point: M4 places the operand address WZ = C030H on the bus)

## Related in Microprocessor

- [Address decoding for input port at 8050H](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Adecoder-input-port-lda-8050h) — Microprocessor, chapter 4
- [Instruction cycle and machine cycle](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainstruction-cycle-machine-cycle) — Microprocessor, chapter 1, asked 2×
- [Timing diagram of STA 8050H](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Atiming-sta-8050h) — Microprocessor, chapter 2
- [Timing diagram of LDA 2080H](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Atiming-lda-2080h) — Microprocessor, chapter 2, asked 2×
- [Execution of LDA 8B7FH with timing](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Atiming-lda-8b7fh) — Microprocessor, chapter 2
- [Stored program concept and processing cycle](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Astored-program-processing-cycle) — Microprocessor, chapter 1, asked 6×

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