---
title: "Short note: USART"
subject: "Microprocessor"
chapter: 4
key: "semester_4/microprocessor:short-note-usart"
source: https://www.bctengineer.com/q/semester_4/microprocessor/short-note-usart
site: BCT Engineering
---

# Short note: USART

Microprocessor · Chapter 4: Microprocessor System

- Asked in: 2073 Bhadra, 4 marks; 2068 Bhadra, 4 marks (asked 2 times)
- Video: [8251A - USART - Architecture of 8251 - Serial communication Interface - MPMC](https://www.youtube.com/watch?v=i-4hZ540Hlc) — Padmasri Naban
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/microprocessor/short-note-usart
- Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-4

## Question

Write a short note on USART.

## Short answer

The USART (e.g., Intel 8251A) converts parallel data to serial and vice versa, supporting asynchronous and synchronous modes. It is programmable via mode and command words, provides handshake signals (TxRDY, RxRDY), and interfaces microprocessors to RS-232 using level converters.

## Answer

A **USART** (Universal Synchronous Asynchronous Receiver Transmitter) is a programmable serial communication chip that converts parallel data from the processor into serial form for transmission and serial data received into parallel. The Intel **8251A** is the standard example for 8085/8086 systems.

```text
 D0-D7 <-> [Data bus buf] <-> [Transmit buffer] -> TxD
 RD WR CS C/D  [Read/write ]   [Transmit control]  TxRDY TxEMPTY
 RESET CLK     [control    ]   [Receive buffer ] <- RxD
               [Modem ctrl ]   [Receive control]    RxRDY
                DTR DSR RTS CTS                     SYNDET
```

**Features**
- Works in **asynchronous** mode (5–8 data bits, 1/1.5/2 stop bits, parity, baud factor ×1, ×16, ×64) and **synchronous** mode (internal or external sync detect, 1 or 2 sync characters).
- Full duplex; double-buffered transmitter and receiver.
- Detects parity, overrun and framing errors.
- Modem control signals: DTR, DSR, RTS, CTS.

**Programming:** after reset, the **mode instruction** is written first (baud factor, character length, parity, stop bits), followed by the **command instruction** (enable Tx/Rx, DTR, RTS, error reset, internal reset). The **status word** is read to check TxRDY, RxRDY, TxEMPTY, PE, OE, FE and others. The C/D pin selects data (0) or control/status (1).

**Use:** interfacing a microprocessor with RS-232 terminals, modems and other serial devices, usually with a MAX232 level converter.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the correct order of programming the 8251A after reset?
   A. Command instruction, then mode instruction
   B. Mode instruction first, then command instruction
   C. Status word, then mode instruction
   D. Only the command instruction is needed
   Answer: B. After reset the mode instruction (baud factor, length, parity, stop bits) is written first, followed by the command instruction (enable Tx/Rx, DTR, RTS, resets). (Key point: Programming order)

2. What does the C/D pin of the 8251A select?
   A. Clock or data rate
   B. Receive or transmit
   C. Data (0) or control/status (1)
   D. Synchronous or asynchronous mode
   Answer: C. C/D = 0 selects the data buffers and C/D = 1 selects the control register (write) or status register (read). (Key point: C/D pin)

3. Which errors can the USART detect?
   A. Parity, overrun and framing errors
   B. Only parity errors
   C. Address and bus errors
   D. Baud-rate and cable errors
   Answer: A. The status word contains PE (parity), OE (overrun) and FE (framing) flags, along with TxRDY, RxRDY and TxEMPTY. (Key point: Errors detected)