--- title: "Stored program concept and processing cycle" subject: "Microprocessor" chapter: 1 key: "semester_4/microprocessor:stored-program-processing-cycle" source: https://www.bctengineer.com/q/semester_4/microprocessor/stored-program-processing-cycle site: BCT Engineering --- # Stored program concept and processing cycle Microprocessor · Chapter 1: Introduction to Microprocessor - Asked in: 2073 Bhadra, 4 marks; 2072 Magh, 4 marks; 2071 Bhadra, 4 marks; 2071 Magh, 4 marks; 2069 Poush, 8 marks; 2068 Bhadra, 2+6 marks (asked 6 times) - Video: [L-1.2: Von Neumann's Architecture | Stored Memory Concept in Computer Architecture](https://www.youtube.com/watch?v=j8NnE1YeSN0) — Gate Smashers - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_4/microprocessor/stored-program-processing-cycle - Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-1 ## Question What do you mean by the stored program concept? Explain the processing (instruction) cycle of a stored program (Von Neumann) computer. ## Short answer In a stored program computer, instructions and data reside in the same read/write memory, so any program can run by changing memory contents. The processing cycle repeatedly fetches the instruction (PC→MAR, IR←M[PC], PC+1), decodes the opcode, fetches operands if needed, executes the operation, stores results, and checks for interrupts. ## Answer The **stored program concept** (Von Neumann architecture) means that both the program (instructions) and the data are stored together in the same read/write memory, as binary numbers. The CPU fetches instructions from memory one by one and executes them in sequence, so changing the program only needs new contents in memory, not new wiring. **Main features** - One memory holds instructions and data; each location has an address. - A Program Counter (PC) holds the address of the next instruction, so execution is sequential unless a jump/call changes the PC. - Instructions are fetched, decoded and executed by the control unit and ALU. - The same memory can be loaded with any program, so one machine does many tasks. ```text +-----+ address +---------------+ | CPU |---------->| MEMORY | | CU |<--------->| program + data| | ALU | data +---------------+ +-----+ ``` #### Processing (instruction) cycle The CPU repeats the following cycle for every instruction. 1. **Fetch**: the address in PC is sent to memory, the instruction byte is read, placed in the Instruction Register (IR), and PC is incremented to point to the next byte. 2. **Decode**: the control unit decodes the opcode in IR and finds out the operation and how many more bytes (operands) are needed. 3. **Fetch operand (if needed)**: extra bytes or data from memory/registers are read. 4. **Execute**: the ALU or other unit performs the operation (add, move, jump, etc.). 5. **Store result** (the end of the execute phase): the result is written to a register or memory, and flags are updated. 6. **Check for interrupts**: before the next fetch, the CPU checks for a pending interrupt; if one is accepted, an interrupt cycle runs instead of the next fetch. Otherwise the cycle repeats from step 1. In RTL form: ```text Fetch: MAR <- PC MDR <- M[MAR] PC <- PC + 1 IR <- MDR Decode: control unit decodes IR Execute: operation specified by the opcode, e.g. ADD r: A <- A + r ; update flags ``` The cycle stops when a halt instruction is executed or power is removed. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What does the stored program concept state? A. Instructions are in ROM and data in RAM, in separate memories B. Instructions and data are kept together in the same read/write memory as binary numbers C. The program is wired into the control unit D. Only data is stored; instructions are supplied by the user one by one Answer: B. Von Neumann machines keep program and data in one memory, so changing the program only needs new memory contents. (Key point: Stored program concept) 2. What is the job of the Program Counter during execution? A. Holds the address of the next instruction B. Holds the result of the last ALU operation C. Holds the opcode being decoded D. Counts how many programs are stored Answer: A. PC holds the address of the next instruction and is incremented after each fetch unless a jump or call changes it. (Key point: Role of PC) 3. In the fetch step, what happens? A. The ALU performs the operation and flags are updated B. The control unit decodes the opcode in IR C. The address in PC goes to memory, the instruction is read into IR, and PC is incremented D. The result is written back to a register Answer: C. Fetch sends PC to memory, reads the instruction into IR and increments PC. (Key point: Fetch step) 4. When is the interrupt check made in the cycle? A. Before the next fetch, after the current instruction finishes B. Only during the decode step C. In the middle of the execute step D. Only when the program halts Answer: A. Before each next fetch the CPU checks for a pending interrupt; if accepted, an interrupt cycle runs instead of the fetch. (Key point: Interrupt check) ## Related in Microprocessor - [Instruction cycle and machine cycle](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainstruction-cycle-machine-cycle) — Microprocessor, chapter 1, asked 2× - [Fetch and execution cycle with RTL](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Afetch-execute-cycle-rtl) — Microprocessor, chapter 1 - [Machine cycle, T-states, ANI 55H timing](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Amachine-cycle-tstate-ani-55h) — Microprocessor, chapter 2 - [Timing diagram of STA, program time](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Atiming-sta-program-time) — Microprocessor, chapter 2 ## Related in other subjects - [Short note: Stored program control](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Ashort-note-spc-digital-exchange) — Telecommunications, chapter 4 - [Instruction cycle state diagram with interrupt](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Ainstr-cycle) — Computer Organization and Architecture, chapter 1, asked 6× - [PCM switching and stored program control](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Apcm-switching-spc) — Telecommunications, chapter 4 - [Computer image processing with example](https://www.bctengineer.com/question.md?key=semester_8%2Fmultimedia_system%3Acomputer-image-processing) — Multimedia System, chapter 3