---
title: "Synchronous vs asynchronous serial transmission"
subject: "Microprocessor"
chapter: 4
key: "semester_4/microprocessor:sync-async-serial"
source: https://www.bctengineer.com/q/semester_4/microprocessor/sync-async-serial
site: BCT Engineering
---

# Synchronous vs asynchronous serial transmission

Microprocessor · Chapter 4: Microprocessor System

- Asked in: 2070 Magh, 1+3 marks; 2069 Poush, 4 marks; 2068 Magh, 3 marks (asked 3 times)
- Video: [Asynchronous and Synchronous Serial Data Transmissions Technique in Hindi.](https://www.youtube.com/watch?v=S2q7enbXlTE) — Quick Learn
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_4/microprocessor/sync-async-serial
- Whole chapter: https://www.bctengineer.com/md/semester_4/microprocessor/chapter-4

## Question

What do you mean by serial interface? Differentiate between synchronous and asynchronous serial data transmission.

## Short answer

A serial interface transmits data one bit at a time. Synchronous transmission uses a shared clock and sends blocks with sync characters, offering high speed and low overhead. Asynchronous transmission sends individual characters framed by start/stop bits, using separate clocks, simpler but slower with higher overhead.

## Answer

#### Serial interface
A **serial interface** transfers data one bit at a time over a single line, so only a few wires are needed (TxD, RxD, ground). The processor's parallel data is converted to serial by a shift register (e.g. USART 8251A) and back at the receiver. It is cheap and suits long distance, but slower than parallel.

#### Synchronous vs asynchronous transmission
| Point | Synchronous | Asynchronous |
|---|---|---|
| Clock | Transmitter and receiver share the same clock (sent with data or recovered) | Separate clocks; no clock sent |
| Unit sent | Block of characters (frame) | One character at a time |
| Framing | Sync characters at the start of a block | Start bit and stop bit(s) around each character |
| Idle gap | None between characters in a block | Any gap between characters |
| Overhead | Low (few sync characters per block) | High (2–3 extra bits per 8-bit character) |
| Speed | High (e.g. disk, networks) | Low to medium (keyboard, modem) |
| Cost/complexity | More complex hardware | Simple and cheap |
| Example | HDLC, SDLC, 8251A in sync mode | RS-232 terminal link |

```text
 Asynchronous frame (one character):
 idle ‾|_| D0 D1 D2 D3 D4 D5 D6 D7 |P| ‾‾|
       start   data bits         parity stop
 Synchronous: SYNC SYNC | data data data ... | CRC
```
In asynchronous format the receiver detects the 1 → 0 transition of the start bit and samples each bit at the agreed baud rate (usually with a 16× or 64× clock).

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How is each character framed in asynchronous serial transmission?
   A. By SYNC characters before a block
   B. By a start bit and stop bit(s) around each character
   C. By a shared clock line only
   D. By a CRC after each character
   Answer: B. Asynchronous format wraps each character with a start bit and one or more stop bits (and optional parity). (Key point: Asynchronous framing)

2. Why is synchronous transmission more efficient than asynchronous?
   A. It uses fewer data bits per character
   B. It does not need a clock
   C. It uses simpler hardware
   D. Only a few sync characters are needed per block, not extra bits for every character
   Answer: D. Synchronous sends a block with a few sync characters, while asynchronous adds 2-3 extra bits to each 8-bit character. (Key point: Synchronous overhead)

3. How does an asynchronous receiver find the start of a character?
   A. It detects the 1 to 0 transition of the start bit and samples bits at the agreed baud rate
   B. It waits for the SYNC character
   C. It uses a clock sent along with the data
   D. It counts bits since the last stop bit
   Answer: A. No clock is sent, so the receiver synchronises on the start-bit falling edge and then samples each bit at the baud rate (often with a 16x or 64x clock). (Key point: Receiver detects start)

## Related in Microprocessor

- [Short note: serial and parallel interface](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aserial-parallel-interface) — Microprocessor, chapter 4
- [Synchronous/asynchronous bus; LXI timing](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Async-async-bus-lxi-timing) — Microprocessor, chapter 2, asked 2×

## Related in other subjects

- [Synchronous vs asynchronous transmission](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Async-vs-async) — Instrumentation II, chapter 3
- [Error detection in serial data transmission](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aserial-error-detection) — Instrumentation II, chapter 3, asked 2×
- [Synchronous vs asynchronous circuits; SR to JK](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Async-async-sr-to-jk) — Digital Logic, chapter 6
- [Multiplexing; synchronous vs asynchronous TDM](https://www.bctengineer.com/question.md?key=semester_5%2Fdata_communication%3Amux-compare-sync-async-tdm) — Data Communication, chapter 6, asked 6×