--- title: "Address-format code for unspecified-2075-asoj" subject: "Computer Organization and Architecture" chapter: 2 key: "semester_5/computer_organization_and_architecture:address-code-15" source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/address-code-15 site: BCT Engineering --- # Address-format code for unspecified-2075-asoj Computer Organization and Architecture · Chapter 2: Central Processing Unit - Asked in: 2075 Asoj, 8 marks - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/address-code-15 - Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-2 ## Question Write codes for a given operation using zero, one, two and three address instruction format. [the operation/expression is not printed in the scan] ## Short answer For a representative expression like Y=(A+B)*(C-D), the code lengths are three three-address, six two-address, seven one-address, and eight zero-address instructions. The one-address version uses the accumulator and temporary locations. ## Answer The expression of this question is not printed in the scan. As a representative example, the operation **Y = (A + B) × (C - D)** is used; the method is the same for any expression. Assumptions: the operands are memory locations, `R1, R2, ...` are CPU registers, `T1, T2, ...` are temporary memory locations, and `Y` receives the result. Multiplication and division are done before addition and subtraction, and equal-priority operators go left to right. Fully bracketed: **Y = (A+B)*(C-D)**. Postfix (reverse Polish) form: `A B + C D - *`. #### Three-address instructions (OP dest, src1, src2) ```text ADD R1, A, B ; R1 = A + B SUB R2, C, D ; R2 = C - D MUL Y, R1, R2 ; Y = R1 * R2 ``` Number of instructions: 3. Shortest program, but each instruction is long (three addresses). #### Two-address instructions (OP dest, src; dest = dest OP src) ```text MOV R1, A ; R1 = A ADD R1, B ; R1 = R1 + B MOV R2, C ; R2 = C SUB R2, D ; R2 = R2 - D MUL R1, R2 ; R1 = R1 * R2 MOV Y, R1 ; Y = R1 ``` Number of instructions: 6. A MOV is needed first because the destination operand is overwritten. #### One-address instructions (accumulator AC is the implied operand) ```text LOAD A ; AC = A ADD B ; AC = AC + B STORE T1 ; T1 = AC LOAD C ; AC = C SUB D ; AC = AC - D MUL T1 ; AC = AC * T1 STORE Y ; Y = AC ``` Number of instructions: 7. Intermediate results that cannot stay in AC are saved in memory temporaries. #### Zero-address instructions (stack machine) ```text PUSH A ; push A PUSH B ; push B ADD ; pop two, compute, push result PUSH C ; push C PUSH D ; push D SUB ; pop two, compute, push result MUL ; pop two, compute, push result POP Y ; Y = top of stack ``` Number of instructions: 8. Only PUSH and POP carry an address; ADD, SUB, MUL, DIV work on the top two stack items, so the program follows the postfix form directly. **Summary:** 3-address = 3, 2-address = 6, 1-address = 7, 0-address = 8 instructions. Fewer addresses per instruction means shorter instructions but more of them. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is the postfix form of Y = (A+B) x (C-D)? A. A B + C D - * B. A B C D + - * C. A B + C D * - D. A B * C D - + Answer: A. Each bracket becomes its own postfix pair and the final operator * follows. (Key point: Postfix form) 2. How many three-address instructions are needed? A. 2 B. 3 C. 4 D. 6 Answer: B. ADD, SUB and MUL: three instructions. (Key point: Three-address count) 3. In one-address code, why are STORE Tn instructions needed in the middle of the program? A. To convert the expression to postfix form B. Because the ALU cannot add numbers directly C. The accumulator is the only implied register, so an intermediate result must be saved in memory before AC is reused D. To increase the number of addresses per instruction Answer: C. AC holds only one value; a partial result needed later has to be stored in a temporary memory location. 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