---
title: "Address-format code for X=(P+Q)×(R+S)"
subject: "Computer Organization and Architecture"
chapter: 2
key: "semester_5/computer_organization_and_architecture:address-code-2"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/address-code-2
site: BCT Engineering
---

# Address-format code for X=(P+Q)×(R+S)

Computer Organization and Architecture · Chapter 2: Central Processing Unit

- Asked in: 2074 Chaitra, 8 marks
- Video: [Instruction Format | zero, one, two and three address instructions program | CAO | COA](https://www.youtube.com/watch?v=Htw_NTvj1ss) — Techno Tutorials ( e-Learning)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/address-code-2
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-2

## Question

Write codes using 3, 2, 1 and 0 address instruction formats to perform the operation X = (P+Q) × (R+S).

## Short answer

The expression X = (P+Q)*(R+S) requires 3 three-address, 6 two-address, 7 one-address and 8 zero-address instructions. The postfix form is P Q + R S + *.

## Answer

Assumptions: the operands are memory locations, `R1, R2, ...` are CPU registers, `T1, T2, ...` are temporary memory locations, and `X` receives the result. Multiplication and division are done before addition and subtraction, and equal-priority operators go left to right.

Fully bracketed: **X = (P+Q)*(R+S)**. Postfix (reverse Polish) form: `P Q + R S + *`.

#### Three-address instructions (OP dest, src1, src2)
```text
ADD R1, P, Q   ; R1 = P + Q
ADD R2, R, S   ; R2 = R + S
MUL X, R1, R2  ; X = R1 * R2
```
Number of instructions: 3. Shortest program, but each instruction is long (three addresses).

#### Two-address instructions (OP dest, src; dest = dest OP src)
```text
MOV R1, P   ; R1 = P
ADD R1, Q   ; R1 = R1 + Q
MOV R2, R   ; R2 = R
ADD R2, S   ; R2 = R2 + S
MUL R1, R2  ; R1 = R1 * R2
MOV X, R1   ; X = R1
```
Number of instructions: 6. A MOV is needed first because the destination operand is overwritten.

#### One-address instructions (accumulator AC is the implied operand)
```text
LOAD P    ; AC = P
ADD Q     ; AC = AC + Q
STORE T1  ; T1 = AC
LOAD R    ; AC = R
ADD S     ; AC = AC + S
MUL T1    ; AC = AC * T1
STORE X   ; X = AC
```
Number of instructions: 7. Intermediate results that cannot stay in AC are saved in memory temporaries.

#### Zero-address instructions (stack machine)
```text
PUSH P  ; push P
PUSH Q  ; push Q
ADD     ; pop two, compute, push result
PUSH R  ; push R
PUSH S  ; push S
ADD     ; pop two, compute, push result
MUL     ; pop two, compute, push result
POP X   ; X = top of stack
```
Number of instructions: 8. Only PUSH and POP carry an address; ADD, SUB, MUL, DIV work on the top two stack items, so the program follows the postfix form directly.

**Summary:** 3-address = 3, 2-address = 6, 1-address = 7, 0-address = 8 instructions. Fewer addresses per instruction means shorter instructions but more of them.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Postfix of (P+Q)*(R+S) is
   A. P Q R S + + *
   B. P Q + R S + *
   C. P Q * R S * +
   D. P Q + R + S *
   Answer: B. Operators follow operands. (Key point: Postfix)

2. Why STORE T1 in one-address code?
   A. To end the program
   B. To clear AC for the next instruction
   C. To set the status flags
   D. AC is needed for the second sum
   Answer: D. Intermediate results must be saved. (Key point: One-address temp)

3. Instruction counts for 3, 2, 1, 0 address are
   A. 8, 7, 6, 3
   B. 3, 6, 7, 8
   C. 3, 3, 3, 3
   D. 6, 6, 7, 8
   Answer: B. Fewer addresses mean more instructions. (Key point: Counts)

4. In two-address MUL R1, R2, the result is
   A. R2 = R1 * R2
   B. X = R1 * R2
   C. AC = R1
   D. R1 = R1 * R2
   Answer: D. dest is first operand. (Key point: Two-address)

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