---
title: "Addressing modes in given instructions"
subject: "Computer Organization and Architecture"
chapter: 2
key: "semester_5/computer_organization_and_architecture:addressing-modes-8085"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/addressing-modes-8085
site: BCT Engineering
---

# Addressing modes in given instructions

Computer Organization and Architecture · Chapter 2: Central Processing Unit

- Asked in: 2073 Shrawan, 10 marks
- Video: [Addressing Modes of 8085 Microprocessor](https://www.youtube.com/watch?v=RyMT7GznQUo) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/addressing-modes-8085
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-2

## Question

The following instructions are given: i) LDA 2000H ii) MVI B, 32H iii) STAX D iv) MOV A, B. Which addressing modes are used in the above instructions? Explain briefly about them.

## Short answer

LDA 2000H uses direct addressing (16-bit address in instruction). MVI B,32H uses immediate addressing (data in instruction). STAX D uses register indirect addressing (address in DE pair). MOV A,B uses register addressing (both operands registers).

## Answer

The 8085 finds the location of an operand using an addressing mode. The four instructions use:

| Instruction | Addressing mode |
|---|---|
| i) LDA 2000H | Direct addressing |
| ii) MVI B, 32H | Immediate addressing |
| iii) STAX D | Register indirect addressing |
| iv) MOV A, B | Register addressing |

#### i) LDA 2000H: direct addressing
The 16-bit address of the operand is given in the instruction itself (3 bytes: the opcode, then the low and high address bytes). The content of memory location 2000H is loaded into the accumulator. If M[2000H] = 5AH, then A = 5AH.

#### ii) MVI B, 32H: immediate addressing
The data (32H) is part of the instruction (2 bytes: opcode and data). It is moved into register B with no memory access for the operand. B = 32H.

#### iii) STAX D: register indirect addressing
The register pair DE holds the memory address where the data is to be stored. The accumulator content is stored in the memory location pointed to by DE. If DE = 3000H and A = 7FH, then M[3000H] = 7FH. It is a 1-byte instruction.

#### iv) MOV A, B: register addressing
Both operands are CPU registers, and the data is copied from register B to register A. It is a 1-byte instruction and executes fastest because no memory is accessed. A = B.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which addressing mode is used by LDA 2000H?
   A. Immediate addressing
   B. Register indirect addressing
   C. Direct addressing
   D. Register addressing
   Answer: C. The 16-bit address of the operand is given in the instruction itself, so it is direct addressing. (Key point: Direct addressing)

2. In MVI B, 32H, where is the data 32H found?
   A. In memory location 32H
   B. It is part of the instruction itself
   C. In register pair HL
   D. In the accumulator
   Answer: B. Immediate addressing places the data inside the instruction, so no memory access is made for the operand. (Key point: Immediate addressing)

3. In STAX D with DE = 3000H and A = 7FH, what happens?
   A. DE is loaded with 7FH
   B. A is loaded from M[3000H]
   C. M[7FH] = 3000H
   D. M[3000H] = 7FH
   Answer: D. The DE pair holds the memory address, and the accumulator is stored at that address. (Key point: Register indirect STAX D)

4. Why does MOV A, B execute fastest among the four instructions?
   A. Both operands are CPU registers, so no memory is accessed
   B. It is a three-byte instruction
   C. The data is inside the instruction
   D. It uses the stack
   Answer: A. Register addressing copies between registers; it is a one-byte instruction with no memory access. (Key point: Register addressing speed)

## Related in Computer Organization and Architecture

- [Addressing modes with examples](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes) — Computer Organization and Architecture, chapter 2, asked 10×
- [LD instruction under addressing modes](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Ald-addressing-modes) — Computer Organization and Architecture, chapter 2

## Related in other subjects

- [Addressing modes of 8051](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-addressing-modes) — Embedded System, chapter 9, asked 4×
- [Instruction and data format, addressing modes](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-instruction-data-format-addressing) — Microprocessor, chapter 2, asked 2×
- [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2×
- [Features and addressing modes of 8085](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-features-addressing-modes) — Microprocessor, chapter 2