---
title: "Direct mapping with 32-block memory, 8-block cache"
subject: "Computer Organization and Architecture"
chapter: 6
key: "semester_5/computer_organization_and_architecture:direct-mapping-example"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/direct-mapping-example
site: BCT Engineering
---

# Direct mapping with 32-block memory, 8-block cache

Computer Organization and Architecture · Chapter 6: Memory System

- Asked in: 2074 Chaitra, 6 marks
- Video: [Direct Memory Mapping – Solved Examples](https://www.youtube.com/watch?v=OxaYvJquPe0) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/direct-mapping-example
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-6

## Question

Suppose main memory has 32 blocks and cache memory has 8 blocks. When 12 blocks of main memory are used, show how mapping is performed in direct mapping.

## Short answer

In direct mapping with 32 main blocks and 8 cache lines, line = block mod 8. Accessing blocks 0–11 sequentially fills lines 0–7, then blocks 8–11 overwrite lines 0–3. Final cache: lines 0–3 hold blocks 8–11 (tag 01), lines 4–7 hold blocks 4–7 (tag 00).

## Answer

In direct mapping a main-memory block j goes to cache line (j mod 8). Main memory has 32 blocks, so a block address has 5 bits; the cache has 8 lines, so the line field has 3 bits and the tag has 5-3 = 2 bits.

```text
Block address = Tag (2) | Line (3)
```

Assumption: the 12 blocks used are blocks 0 to 11, accessed in order 0, 1, 2, ..., 11 (the first access of each block is a miss).

| Block | Block address (5 bits) | Tag (2) | Line (3) | Cache line | Action |
|---|---|---|---|---|---|
| 0 | 00000 | 00 | 000 | 0 | loaded into empty line |
| 1 | 00001 | 00 | 001 | 1 | loaded into empty line |
| 2 | 00010 | 00 | 010 | 2 | loaded into empty line |
| 3 | 00011 | 00 | 011 | 3 | loaded into empty line |
| 4 | 00100 | 00 | 100 | 4 | loaded into empty line |
| 5 | 00101 | 00 | 101 | 5 | loaded into empty line |
| 6 | 00110 | 00 | 110 | 6 | loaded into empty line |
| 7 | 00111 | 00 | 111 | 7 | loaded into empty line |
| 8 | 01000 | 01 | 000 | 0 | replaces block 0 |
| 9 | 01001 | 01 | 001 | 1 | replaces block 1 |
| 10 | 01010 | 01 | 010 | 2 | replaces block 2 |
| 11 | 01011 | 01 | 011 | 3 | replaces block 3 |

Final cache contents:

| Cache line | Block held | Tag |
|---|---|---|
| 0 | B8 | 01 |
| 1 | B9 | 01 |
| 2 | B10 | 01 |
| 3 | B11 | 01 |
| 4 | B4 | 00 |
| 5 | B5 | 00 |
| 6 | B6 | 00 |
| 7 | B7 | 00 |

Blocks that differ by a multiple of 8 compete for the same line (for example block 0 and block 8). The tag stored with each line tells which of these blocks is present. A block is a hit if the line's tag equals the tag of the address; no replacement algorithm is needed because each block has only one possible line.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is the tag 2 bits?
   A. 32 blocks need 2 bits
   B. 5-bit block address minus 3-bit line field
   C. Cache has 2 lines
   D. 8 - 6
   Answer: B. 32 blocks = 5 bits; 8 lines = 3 bits; tag = 2. (Key point: Tag bits)

2. What happens when block 8 is accessed?
   A. Goes to line 8
   B. Goes to a free line
   C. Maps to line 0 and replaces block 0
   D. Replaces block 7
   Answer: C. 8 mod 8 = 0. (Key point: Conflict)

3. After blocks 0 to 11, what does line 4 hold?
   A. Block 4 with tag 00
   B. Block 12
   C. Block 8
   D. Empty
   Answer: A. Lines 4-7 were not overwritten. (Key point: Final contents)

## Close variants set in other exams

- [Direct mapping with 32-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-10) — Computer Organization and Architecture, chapter 6, asked 3×
- [Direct mapping with 64-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-64) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in Computer Organization and Architecture

- [Cache read and direct-mapping demerits](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-demerits) — Computer Organization and Architecture, chapter 6
- [Direct cache mapping](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in other subjects

- [Cache memory mapping techniques](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-mapping-techniques) — Embedded System, chapter 4, asked 3×