---
title: "Direct mapping with 32-block memory, 10 blocks used"
subject: "Computer Organization and Architecture"
chapter: 6
key: "semester_5/computer_organization_and_architecture:direct-mapping-example-10"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/direct-mapping-example-10
site: BCT Engineering
---

# Direct mapping with 32-block memory, 10 blocks used

Computer Organization and Architecture · Chapter 6: Memory System

- Asked in: 2070 Asar, 2 marks
- Video: [Direct Memory Mapping – Solved Examples](https://www.youtube.com/watch?v=OxaYvJquPe0) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/direct-mapping-example-10
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-6

## Question

Suppose main memory has 32 blocks and cache memory has 8 blocks. When 10 blocks of main memory are used, show how mapping is performed in the direct mapping technique.

## Short answer

Direct mapping: block j placed in line j mod 8. For blocks 0–9 accessed sequentially, blocks 0–7 fill lines 0–7; block 8 replaces block 0 in line 0, block 9 replaces block 1 in line 1. Final cache: line0 holds B8 (tag 01), line1 B9 (tag 01), lines2–7 hold B2–B7 (tag 00).

## Answer

In direct mapping a main-memory block j goes to cache line (j mod 8). Main memory has 32 blocks, so a block address has 5 bits; the cache has 8 lines, so the line field has 3 bits and the tag has 5-3 = 2 bits.

```text
Block address = Tag (2) | Line (3)
```

Assumption: the 10 blocks used are blocks 0 to 9, accessed in order.

| Block | Block address (5 bits) | Tag (2) | Line (3) | Cache line | Action |
|---|---|---|---|---|---|
| 0 | 00000 | 00 | 000 | 0 | loaded into empty line |
| 1 | 00001 | 00 | 001 | 1 | loaded into empty line |
| 2 | 00010 | 00 | 010 | 2 | loaded into empty line |
| 3 | 00011 | 00 | 011 | 3 | loaded into empty line |
| 4 | 00100 | 00 | 100 | 4 | loaded into empty line |
| 5 | 00101 | 00 | 101 | 5 | loaded into empty line |
| 6 | 00110 | 00 | 110 | 6 | loaded into empty line |
| 7 | 00111 | 00 | 111 | 7 | loaded into empty line |
| 8 | 01000 | 01 | 000 | 0 | replaces block 0 |
| 9 | 01001 | 01 | 001 | 1 | replaces block 1 |

Final cache contents:

| Cache line | Block held | Tag |
|---|---|---|
| 0 | B8 | 01 |
| 1 | B9 | 01 |
| 2 | B2 | 00 |
| 3 | B3 | 00 |
| 4 | B4 | 00 |
| 5 | B5 | 00 |
| 6 | B6 | 00 |
| 7 | B7 | 00 |

Blocks that differ by a multiple of 8 compete for the same line (for example block 0 and block 8). The tag stored with each line tells which of these blocks is present. A block is a hit if the line's tag equals the tag of the address; no replacement algorithm is needed because each block has only one possible line.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In the 8-line direct-mapped cache, which line does block 8 map to?
   A. Line 8
   B. Line 0
   C. Line 1
   D. Line 7
   Answer: B. 8 mod 8 = 0. (Key point: Line number)

2. Main memory has 32 blocks and cache 8 lines. How many tag bits?
   A. 5
   B. 3
   C. 2
   D. 8
   Answer: C. Block address is 5 bits, line field 3 bits, so tag = 2 bits. (Key point: Tag size)

3. What happens when block 8 is loaded?
   A. It goes to a free line 8
   B. It replaces block 0 in line 0
   C. It replaces block 7
   D. It is not cached
   Answer: B. Block 8 shares line 0 with block 0 and overwrites it. (Key point: Conflict)

## Close variants set in other exams

- [Direct mapping with 64-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-64) — Computer Organization and Architecture, chapter 6, asked 3×
- [Direct mapping with 32-block memory, 8-block cache](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in Computer Organization and Architecture

- [Cache read and direct-mapping demerits](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-demerits) — Computer Organization and Architecture, chapter 6
- [Direct cache mapping](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in other subjects

- [Cache memory mapping techniques](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-mapping-techniques) — Embedded System, chapter 4, asked 3×