--- title: "Division operation and hardware" subject: "Computer Organization and Architecture" chapter: 5 key: "semester_5/computer_organization_and_architecture:division-hardware" source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/division-hardware site: BCT Engineering --- # Division operation and hardware Computer Organization and Architecture · Chapter 5: Computer Arithmetic - Asked in: 2070 Asar, 10 marks - Video: [13. Implementing Division](https://www.youtube.com/watch?v=gNEm5QCe0eU) — Padraic Edgington - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/division-hardware - Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-5 ## Question How can a division operation be performed? Explain with its hardware implementation. ## Short answer Hardware: n+1-bit adder/subtractor, registers A (remainder), Q (dividend→quotient), M (divisor), and sequence counter. Restoring: shift left A,Q; do A=A−M; if A<0 set Q0=0 and restore A=A+M else Q0=1; repeat n times. Non-restoring skips restore by using A+M in next cycle. ## Answer Division finds a quotient Q and remainder R with dividend = divisor × Q + R. In hardware it is done by repeated shift and subtract (restoring or non-restoring method), one quotient bit per cycle. #### Hardware implementation ```text +-----------+ +---------+ | Divisor M | | Control | +-----+-----+ | & SC | | (n+1 bits) +----+----+ v | +------------------------+ | | (n+1)-bit adder/subtr. |<---------+ +-----------+------------+ | result / sign v +-----------------+ +-------------------+ | A (remainder) |<->| Q (dividend -> | | n+1 bits | | quotient) n bits| +-----------------+ +-------------------+ <---- shift left as one register ----> ``` - **A** (n+1 bits) starts at 0 and finally holds the remainder. - **Q** (n bits) starts with the dividend and finally holds the quotient; the new quotient bit enters at Q0 as Q shifts left. - **M** holds the divisor; the extra bit in A and the adder keep the sign of A − M. - The adder/subtractor does A − M (and A + M for restoring or non-restoring correction). - The sequence counter SC counts n steps. #### Restoring algorithm 1. Load A = 0, Q = dividend, M = divisor, SC = n. 2. Shift A and Q left by one bit (the MSB of Q goes into the LSB of A). 3. A = A − M. 4. If A < 0 (sign bit 1): set Q0 = 0 and **restore** A by adding M back (A = A + M). If A ≥ 0: set Q0 = 1. 5. SC = SC − 1. If SC ≠ 0 repeat from step 2. 6. At the end Q holds the quotient and A holds the remainder. #### Example: 7 ÷ 3 ```text Step Action A Q - Initial 0000 111 1 Shift left A,Q 0001 110 A = A - M (1 - 3 = -2) 1110 110 A<0: Q0=0, restore A 0001 110 2 Shift left A,Q 0011 100 A = A - M (3 - 3 = 0) 0000 100 A>=0: Q0=1 0000 101 3 Shift left A,Q 0001 010 A = A - M (1 - 3 = -2) 1110 010 A<0: Q0=0, restore A 0001 010 ``` **Answer: 7 ÷ 3: quotient = 2 (010), remainder = 1 (0001)** The non-restoring method saves the restoring addition: it uses A + M in the next cycle when A is negative, so each cycle needs only one add or subtract. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How is division done in hardware? A. By repeated addition of the divisor B. By one multiplication by the reciprocal C. By shifting right only D. By repeated shift and subtract, giving one quotient bit per cycle Answer: D. Dividend = divisor x Q + R; restoring or non-restoring shift-subtract produces one quotient bit each cycle. (Key point: Division principle) 2. Why is register A n+1 bits wide? A. To store the quotient B. To keep the sign of A - M C. To hold two dividends D. To count the cycles Answer: B. The extra bit and adder preserve the sign, which decides Q0 and restoring. (Key point: A width) 3. How does the quotient form in Q? A. Q shifts right and the bit enters at MSB B. Quotient is written into M C. Q shifts left and the new quotient bit enters at Q0 D. A shifts the bits into Q at the end Answer: C. The dividend bits leave Q as new quotient bits enter at Q0. (Key point: Quotient bit entry) 4. What does restoring division give for 7 / 3? A. Quotient 2, remainder 1 B. Quotient 1, remainder 2 C. Quotient 3, remainder 0 D. Quotient 2, remainder 3 Answer: A. Final Q = 010 (2) and A = 0001 (1); 3 x 2 + 1 = 7. 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