---
title: "LD instruction under addressing modes"
subject: "Computer Organization and Architecture"
chapter: 2
key: "semester_5/computer_organization_and_architecture:ld-addressing-modes"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/ld-addressing-modes
site: BCT Engineering
---

# LD instruction under addressing modes

Computer Organization and Architecture · Chapter 2: Central Processing Unit

- Asked in: 2071 Chaitra, 4 marks
- Video: [Processor Addressing Modes](https://www.youtube.com/watch?v=TGcjn8zMhfM) — Computer Science Lessons
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/ld-addressing-modes
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-2

## Question

Describe the operation of the LD (load) instruction under various addressing modes with syntax.

## Short answer

The LD instruction loads data into the accumulator using various addressing modes: immediate (LD #NBR), direct (LD ADR), indirect (LD @ADR), relative (LD $ADR), indexed (LD ADR(X)), register (LD R1), register indirect (LD (R1)), and autoincrement (LD (R1)+). Each mode computes a different effective address: immediate uses the operand in the instruction, direct uses the address field, indirect fetches the address from memory, relative adds to PC, indexed adds to XR, and register modes use register contents directly or as pointers.

## Answer

LD (load) copies data into a register (usually the accumulator AC) from the memory or from the instruction. The effective address (EA) depends on the mode. Syntax shown is the form used in textbooks; # means immediate, @ means indirect.

| Mode | Syntax | Operation |
|---|---|---|
| Immediate | LD #NBR | AC ← NBR (operand is in the instruction) |
| Direct | LD ADR | AC ← M[ADR] (EA = ADR) |
| Indirect | LD @ADR | AC ← M[M[ADR]] (EA = M[ADR]) |
| Relative | LD $ADR | AC ← M[PC + ADR] |
| Indexed | LD ADR(X) | AC ← M[ADR + XR] |
| Register | LD R1 | AC ← R1 |
| Register indirect | LD (R1) | AC ← M[R1] |
| Autoincrement | LD (R1)+ | AC ← M[R1]; R1 ← R1 + 1 |

Example: address field ADR = 500, PC = 200, R1 = 400, XR = 100. Then for direct EA = 500, relative EA = 700, indexed EA = 600, register indirect EA = 400, and immediate loads the number 500 itself.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the difference between LD ADR (direct) and LD @ADR (indirect)?
   A. Direct: AC <- ADR; indirect: AC <- M[ADR]
   B. Direct: AC <- M[ADR]; indirect: AC <- M[M[ADR]]
   C. Direct: AC <- M[M[ADR]]; indirect: AC <- M[ADR]
   D. Both load M[ADR] but indirect also increments ADR
   Answer: B. In indirect mode the word at ADR is itself the effective address of the operand. (Key point: Direct vs indirect)

2. What does LD #NBR do?
   A. Loads the number NBR itself into AC
   B. Loads M[NBR] into AC
   C. Loads M[M[NBR]] into AC
   D. Loads M[PC + NBR] into AC
   Answer: A. In immediate mode the operand is in the instruction, so no memory access is needed. (Key point: Immediate mode)

3. With ADR = 500 and PC = 200, what is the effective address for relative mode?
   A. 500
   B. 200
   C. 700
   D. 600
   Answer: C. Relative EA = PC + ADR = 200 + 500 = 700. (Key point: Relative mode EA)

4. With ADR = 500 and XR = 100, what is the effective address in indexed mode?
   A. 500
   B. 400
   C. 100
   D. 600
   Answer: D. Indexed EA = ADR + XR = 500 + 100 = 600. (Key point: Indexed mode EA)

## Related in Computer Organization and Architecture

- [Addressing modes with examples](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes) — Computer Organization and Architecture, chapter 2, asked 10×
- [Addressing modes in given instructions](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes-8085) — Computer Organization and Architecture, chapter 2
- [Instruction fields and address formats for X=(E+F)*(G+H)](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Acode-fields-e-f-g-h) — Computer Organization and Architecture, chapter 2

## Related in other subjects

- [Instruction and data format, addressing modes](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-instruction-data-format-addressing) — Microprocessor, chapter 2, asked 2×
- [Addressing modes of 8051](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-addressing-modes) — Embedded System, chapter 9, asked 4×
- [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2×
- [Features and addressing modes of 8085](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-features-addressing-modes) — Microprocessor, chapter 2
