---
title: "Memory hierarchy"
subject: "Computer Organization and Architecture"
chapter: 6
key: "semester_5/computer_organization_and_architecture:mem-hierarchy"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/mem-hierarchy
site: BCT Engineering
---

# Memory hierarchy

Computer Organization and Architecture · Chapter 6: Memory System

- Asked in: 2072 Chaitra, 2 marks; 2072 Kartik, 2 marks; 2071 Shrawan, 2 marks (asked 3 times)
- Video: [Memory Hierarchy & Interfacing](https://www.youtube.com/watch?v=lQcU4WwVALI) — Neso Academy
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/mem-hierarchy
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-6

## Question

What is memory hierarchy and why is it formed in a computer system? Draw the memory hierarchy.

## Short answer

Memory hierarchy arranges memories from fast, small, expensive near CPU to slow, large, cheap far away. It is formed because no single memory balances speed, size, and cost; locality of reference ensures most accesses hit upper levels, giving illusion of fast large memory.

## Answer

The **memory hierarchy** arranges the different memories of a computer in levels, from small, fast and costly memory near the CPU to large, slow and cheap memory far from it.

It is formed because no single memory is at once fast, large and cheap. Going down the hierarchy: (i) cost per bit decreases, (ii) capacity increases, (iii) access time increases, and (iv) the frequency of access by the CPU decreases. Because of locality of reference, most accesses are satisfied by the upper levels, so the system behaves almost as fast as the top level and almost as large and cheap as the bottom level.

#### Memory hierarchy

```text
          Faster, smaller, costlier per bit
              /\
             /  \        CPU registers
            /----\       Cache (L1, L2, L3)
           /------\      Main memory (RAM)
          /--------\     Secondary: hard disk / SSD
         /----------\    Tertiary: optical disc, tape
        Slower, larger, cheaper per bit
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is a memory hierarchy formed?
   A. Registers cannot store data
   B. No single memory is fast, large and cheap at once
   C. To make memory volatile
   D. To reduce CPU clock speed
   Answer: B. Levels combine small fast memory with large cheap memory. (Key point: Why formed)

2. Going down the hierarchy, what happens?
   A. Cost per bit falls, capacity and access time rise
   B. Cost, capacity and speed all rise
   C. Cost rises and capacity falls
   D. Access time falls and cost rises
   Answer: A. Lower levels are bigger, cheaper and slower. (Key point: Going down)

3. Why does the hierarchy work well?
   A. CPU never uses lower levels
   B. All data are kept in registers
   C. Locality of reference means most accesses hit upper levels
   D. Disk is as fast as cache
   Answer: C. Most accesses are served by the fast upper levels. (Key point: Locality)

## Related in Computer Organization and Architecture

- [Address sequencing for control memory](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddress-sequencer) — Computer Organization and Architecture, chapter 3, asked 7×
- [Interconnection structure of computer](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Ainterconnection-structure) — Computer Organization and Architecture, chapter 1, asked 3×
- [Characteristics of memory](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Amemory-characteristics) — Computer Organization and Architecture, chapter 6, asked 4×
- [Need for bus hierarchy](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Abus-hierarchy) — Computer Organization and Architecture, chapter 1
- [Bus hierarchy and bus arbitration](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Abus-hierarchy-arbitration) — Computer Organization and Architecture, chapter 1
- [Direct mapping with 32-block memory, 8-block cache](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in other subjects

- [FDM hierarchy and T carrier system](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Afdm-hierarchy-t-carrier) — Telecommunications, chapter 3, asked 2×
- [FDM hierarchy in telephone system](https://www.bctengineer.com/question.md?key=semester_5%2Fdata_communication%3Afdm-hierarchy-telephone) — Data Communication, chapter 6
- [File system vs virtual memory; contiguous allocation](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Afs-vs-virtual-memory-contiguous-tape) — Operating System, chapter 5
- [Simulation of computer system serving WWW](https://www.bctengineer.com/question.md?key=semester_8%2Fsimulation_and_modeling%3Acomputer-system-www-request) — Simulation and Modeling, chapter 10, asked 2×