---
title: "Multiprocessor classification by memory organization"
subject: "Computer Organization and Architecture"
chapter: 8
key: "semester_5/computer_organization_and_architecture:multiprocessor-classification"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/multiprocessor-classification
site: BCT Engineering
---

# Multiprocessor classification by memory organization

Computer Organization and Architecture · Chapter 8: Multiprocessors

- Asked in: 2071 Chaitra, 4 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/multiprocessor-classification
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-8

## Question

How can a multiprocessor be classified according to its memory organization? Explain.

## Short answer

Shared-memory multiprocessors have a global memory (UMA or NUMA) and communicate via shared variables; distributed-memory multiprocessors have private memories per processor and use message passing.

## Answer

Depending on the memory organisation, a multiprocessor is classified as:

#### 1. Shared memory (tightly coupled) multiprocessor
All processors share one global memory. Communication is by reading and writing shared variables. Each processor may also have a local cache or memory.
- **UMA (uniform memory access):** every processor has equal access time to all memory (symmetric multiprocessor, SMP).
- **NUMA (non-uniform memory access):** shared address space but memory is physically distributed, so access time depends on the location.
- It is fast but memory contention and cache coherence limit the number of processors.

#### 2. Distributed memory (loosely coupled) multiprocessor
Each processor has its own private local memory and I/O, and processors communicate by sending messages over a network. There is no memory contention, and it scales easily. Communication is slower and programming is harder.

```text
 Shared:                    Distributed:
 P1  P2  P3                 P1-M1   P2-M2   P3-M3
  \  |  /                     \      |      /
 [ interconnection ]          [ message network ]
       |
 [ shared memory ]
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How are multiprocessors classified in this answer?
   A. By cost
   B. By memory organisation: shared and distributed
   C. By clock speed
   D. By cable length
   Answer: B. Shared (tightly coupled) vs distributed (loosely coupled). (Key point: Classification basis)

2. What is UMA?
   A. No memory
   B. Access time depends on location
   C. Message passing
   D. Every processor has equal access time to all memory
   Answer: D. UMA is the symmetric multiprocessor. (Key point: UMA)

3. Why is access time non-uniform in NUMA?
   A. There is no bus
   B. Processors differ
   C. Memory is too small
   D. Memory is physically distributed, so time depends on location
   Answer: D. Shared address space but distributed physical memory. (Key point: NUMA)

4. How do processors communicate in distributed memory?
   A. By a common register
   B. By DMA
   C. Through shared variables
   D. By sending messages over a network
   Answer: D. Each has private memory; there is no memory contention. (Key point: Distributed memory)

## Related in Computer Organization and Architecture

- [Organization of control memory](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Acontrol-memory-org) — Computer Organization and Architecture, chapter 3
- [OS configurations in multiprocessor systems](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aos-multiprocessor) — Computer Organization and Architecture, chapter 8
- [Multiprocessor performance and reliability](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Amultiprocessor-benefits) — Computer Organization and Architecture, chapter 8
- [Multiprocessor and multiprocessing](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Amultiprocessing-intro) — Computer Organization and Architecture, chapter 8
- [Address sequencing for control memory](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddress-sequencer) — Computer Organization and Architecture, chapter 3, asked 7×
- [Characteristics of memory](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Amemory-characteristics) — Computer Organization and Architecture, chapter 6, asked 4×

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- [Bus organization and memory capacity](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Abus-organization-memory-capacity) — Microprocessor, chapter 1
- [8051 data memory organization](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-data-memory-organization) — Embedded System, chapter 9
- [File system vs virtual memory; contiguous allocation](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Afs-vs-virtual-memory-contiguous-tape) — Operating System, chapter 5
- [Classification of circuit breakers](https://www.bctengineer.com/question.md?key=semester_6%2Fswitchgear_and_protection%3Acb-classification) — Switchgear and Protection, chapter 6
