---
title: "Cache write policy techniques"
subject: "Computer Organization and Architecture"
chapter: 6
key: "semester_5/computer_organization_and_architecture:write-policy"
source: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/write-policy
site: BCT Engineering
---

# Cache write policy techniques

Computer Organization and Architecture · Chapter 6: Memory System

- Asked in: 2073 Shrawan, 3 marks
- Video: [Write Back  vs   Write through  in Cache Memory | Cache memory |COA Lecture series](https://www.youtube.com/watch?v=ZdBTV5mTZqU) — LS Academy for Technical Education 
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/computer_organization_and_architecture/write-policy
- Whole chapter: https://www.bctengineer.com/md/semester_5/computer_organization_and_architecture/chapter-6

## Question

Explain the different write policy techniques in cache memory.

## Short answer

Write-through updates both cache and main memory on every write, keeping memory current but causing high traffic. Write-back updates only the cache and sets a dirty bit, writing to memory only on replacement, which is faster and reduces bus traffic but makes memory stale. Write-once uses write-through for the first write and write-back afterwards for coherence.

## Answer

When the CPU writes to a cached word, the cache and main memory may become different. The write policy decides when main memory is updated.

1. **Write-through:** every write goes to both the cache and main memory at once. Memory is always up to date and the design is simple, but write traffic is high and the CPU may wait for the slow memory (a write buffer reduces this).
2. **Write-back (copy-back):** a write updates only the cache and sets a **dirty bit** on the line. Main memory is updated only when the line is replaced. Writes are fast and the bus traffic is low, but memory is temporarily stale and the control is more complex (important in multiprocessors).
3. **Write-once:** the first write to a block is written through (to tell other caches), later writes are write-back. It is used for cache coherence in multiprocessor systems.

On a write miss the cache uses either **write-allocate** (load the block, then write) or **no-write-allocate** (write directly to memory).

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In write-through, when is main memory updated?
   A. Only when the line is replaced
   B. On every write, together with the cache
   C. Only on the first write
   D. Never until the program ends
   Answer: B. Write-through sends every write to both cache and main memory, so memory is always current. (Key point: Write-through)

2. What is the purpose of the dirty bit in write-back?
   A. It marks the line as holding a modified word, so memory is updated when the line is replaced
   B. It marks the line as empty
   C. It shows the line was read only
   D. It selects the set
   Answer: A. Write-back updates only the cache and sets the dirty bit; memory is written when the dirty line is replaced. (Key point: Write-back and dirty bit)

3. What does write-once do?
   A. Writes the block only once to memory ever
   B. First write is written through, later writes are write-back
   C. Every write is written back
   D. It disables the cache on writes
   Answer: B. The first write goes through to tell other caches, later ones are write-back; used for multiprocessor coherence. (Key point: Write-once)

## Related in Computer Organization and Architecture

- [Cache mapping techniques](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Acache-mapping-techniques) — Computer Organization and Architecture, chapter 6, asked 7×
- [Direct mapping with 32-block memory, 8-block cache](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example) — Computer Organization and Architecture, chapter 6, asked 3×
- [Write policy; direct vs associative mapping](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Awp-direct-vs-assoc) — Computer Organization and Architecture, chapter 6
- [Cache read and direct-mapping demerits](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-demerits) — Computer Organization and Architecture, chapter 6
- [Direct mapping with 32-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-10) — Computer Organization and Architecture, chapter 6, asked 3×
- [Direct mapping with 64-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-64) — Computer Organization and Architecture, chapter 6, asked 3×

## Related in other subjects

- [Cache memory mapping techniques](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-mapping-techniques) — Embedded System, chapter 4, asked 3×
- [Cache write policy and replacement algorithm](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-write-policy-replacement) — Embedded System, chapter 4
- [Cache write techniques](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-write-techniques) — Embedded System, chapter 4
- [Which cache is better (4KB vs 12KB)](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-comparison-4kb-12kb) — Embedded System, chapter 4, asked 2×
