---
title: "Convolutional encoder c(3,1,3), input 111011"
subject: "Data Communication"
chapter: 8
key: "semester_5/data_communication:conv-encoder-313-111011"
source: https://www.bctengineer.com/q/semester_5/data_communication/conv-encoder-313-111011
site: BCT Engineering
---

# Convolutional encoder c(3,1,3), input 111011

Data Communication · Chapter 8: Information Theory and Coding

- Asked in: 2075 Chaitra, 10 marks
- Video: [Convolutional Encoding Using Time Domain and transfer domain Approache | Generator matrix | encoder](https://www.youtube.com/watch?v=-CmR6Dc0cxQ) — Techno Tutorials ( e-Learning)
- Answer checked by Claude Sonnet 5.5 on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/data_communication/conv-encoder-313-111011
- Whole chapter: https://www.bctengineer.com/md/semester_5/data_communication/chapter-8

## Question

Generate a convolution code for an input bit stream of (111011) using a c(3,1,3) architecture.

## Short answer

g1=111, g2=101, g3=011. Input 111011 gives output 110 011 100 010 001 011. Including tail zeros: 110 011 100 010 001 011 010 111.

## Answer

A **c(3,1,3)** convolutional encoder takes 1 input bit and gives 3 output bits (rate 1/3) with constraint length K = 3 (two memory stages s1, s2).

#### Encoder (generators)
- g1 = 111: out1 = b ⊕ s1 ⊕ s2
- g2 = 101: out2 = b ⊕ s2
- g3 = 011: out3 = s1 ⊕ s2

```text
 b --+-->[s1]-->[s2]       out1 = b+s1+s2
     |    |       |        out2 = b+s2
     +----+-------+        out3 = s1+s2   (modulo-2 sums)
```

#### Encoding u = 1 1 1 0 1 1 (initial state s1 s2 = 00)
| t | b | s1 s2 | out1 | out2 | out3 | Output |
|---|---|---|---|---|---|---|
| 1 | 1 | 00 | 1 | 1 | 0 | 110 |
| 2 | 1 | 10 | 0 | 1 | 1 | 011 |
| 3 | 1 | 11 | 1 | 0 | 0 | 100 |
| 4 | 0 | 11 | 0 | 1 | 0 | 010 |
| 5 | 1 | 01 | 0 | 0 | 1 | 001 |
| 6 | 1 | 10 | 0 | 1 | 1 | 011 |
| 7 tail | 0 | 11 | 0 | 1 | 0 | 010 |
| 8 tail | 0 | 01 | 1 | 1 | 1 | 111 |

Row 3 example: b=1, s1=1, s2=1 → out1 = 1⊕1⊕1 = 1, out2 = 1⊕1 = 0, out3 = 1⊕1 = 0.

**Coded output (message part): 110 011 100 010 001 011**
With the two tail zeros that flush the registers: 110 011 100 010 001 011 010 111.

The state after the 6 message bits is 11 (the last two bits), and the tail returns it to 00.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. For c(3,1,3), how many output bits per input bit and how many memory stages?
   A. 3 outputs, 2 memory stages (s1, s2)
   B. 1 output, 3 memory stages
   C. 3 outputs, 3 memory stages
   D. 2 outputs, 2 stages
   Answer: A. Rate is 1/3 and K = 3 means the present bit plus two stored bits. (Key point: Rate and memory)

2. For the first input bit 1 at state 00, what is the output?
   A. 111
   B. 101
   C. 011
   D. 110
   Answer: D. out1 = 1, out2 = 1, out3 = 0, so 110. (Key point: First output)

3. At t=3, b=1 and s1 s2 = 11. What is the output?
   A. 100
   B. 111
   C. 001
   D. 010
   Answer: A. out1 = 1+1+1 = 1, out2 = 1+1 = 0, out3 = 1+1 = 0. (Key point: Third step)

4. Why are two tail zeros appended?
   A. To double the rate
   B. To flush the registers back to state 00
   C. To add parity
   D. To detect errors
   Answer: B. After the message the state is 11; two zeros return it to 00, adding outputs 010 and 111. (Key point: Tail bits)

## Related in Data Communication

- [Convolutional encoder c(3,1,3), input 00110](https://www.bctengineer.com/question.md?key=semester_5%2Fdata_communication%3Aconv-encoder-313-00110) — Data Communication, chapter 8
- [Trellis decoding of 1/2 rate conv. code (3-bit errors)](https://www.bctengineer.com/question.md?key=semester_5%2Fdata_communication%3Aconv-trellis-3bit) — Data Communication, chapter 8, asked 2×
- [Trellis decoding of 1/2 rate conv. code (2-bit errors)](https://www.bctengineer.com/question.md?key=semester_5%2Fdata_communication%3Aconv-trellis-2bit) — Data Communication, chapter 8, asked 2×

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- [Short note: Trellis diagram of convolutional encoder](https://www.bctengineer.com/question.md?key=semester_6%2Fcommunication_systems%3Ashort-note-trellis-1010-half-rate) — Communication Systems, chapter 8
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