---
title: "Errors in ADC and DAC"
subject: "Instrumentation II"
chapter: 4
key: "semester_5/instrumentation_ii:adc-dac-errors"
source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/adc-dac-errors
site: BCT Engineering
---

# Errors in ADC and DAC

Instrumentation II · Chapter 4: Interfacing A/D And D/A Converters

- Asked in: 2074 Chaitra, 4 marks; 2073 Chaitra, 3 marks; 2072 Kartik, 6 marks; 2070 Asar, 8 marks; 2070 Chaitra, 8 marks; 2075 Chaitra, 4 marks; 2069 Chaitra, 3 marks (asked 7 times)
- Answer checked by Claude Sonnet 5.5 on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/adc-dac-errors
- Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-4

## Question

Explain the errors associated with A/D and D/A converters.

## Short answer

Errors: offset error (non‑zero output at zero input), gain error (incorrect slope), integral nonlinearity (INL) and differential nonlinearity (DNL). DNL < –1 LSB causes missing codes in ADC and non‑monotonicity in DAC. ADC adds quantisation error (±½ LSB) and aperture jitter; DAC may exhibit glitches.

## Answer

Real converters differ from the ideal transfer characteristic. The main errors of A/D and D/A converters are as follows (LSB = 1 least significant bit = FSR / 2^n).

#### Errors common to ADC and DAC
1. **Offset error:** the transfer curve is shifted; with zero input the output is not zero (DAC) or the first transition does not occur at 0.5 LSB (ADC). Can be trimmed to zero.
2. **Gain (full-scale) error:** the slope of the characteristic is wrong, so the full-scale output or last code transition differs from ideal. It is the difference between actual and ideal full-scale after offset is removed.
3. **Nonlinearity:**
   - **Integral nonlinearity (INL):** maximum deviation of the actual transfer curve from the ideal straight line.
   - **Differential nonlinearity (DNL):** deviation of each step width from 1 LSB. DNL <= -1 LSB gives **missing codes** in an ADC and **non-monotonicity** in a DAC.
4. **Temperature drift and supply sensitivity:** offset, gain and reference change with temperature and supply voltage (PSRR).
5. **Noise:** thermal and reference noise reduce effective resolution (ENOB).

#### ADC-specific errors
6. **Quantisation error:** the analog input is mapped to a finite number of codes, so there is an error of up to +/-1/2 LSB (uncertainty of 1 LSB). It cannot be removed, only reduced by more bits.
7. **Missing codes:** some output codes never appear.
8. **Aperture error / jitter:** uncertainty of the sampling instant; error = slew rate x aperture time.
9. **Aliasing:** if sampling rate is less than twice the highest input frequency, high frequencies appear as false low ones.
10. **Conversion time/ hold droop:** the input changes during conversion unless S/H is used.

#### DAC-specific errors
11. **Non-monotonicity:** output decreases when code increases (large DNL).
12. **Settling time:** time to reach within 1/2 LSB after a code change; limits speed.
13. **Glitches:** momentary spikes at major carry transitions (for example 0111 1111 to 1000 0000) because switches change at different times.
14. **Resistor mismatch** in R-2R ladder and switch on-resistance cause nonlinearity.

```text
 Output code
  ^        ideal
  |       /  actual with gain error
  |   . /
  |  . /     offset error shifts the line
  | ./
  +--------------------> Input
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. DNL <= -1 LSB causes what?
   A. Missing codes in ADC / non-monotonicity in DAC
   B. Offset
   C. Glitches only
   D. Aliasing
   Answer: A. A step width of zero removes a code. (Key point: DNL)

2. Quantisation error of ADC?
   A. Removed by trimming
   B. Up to +/-1/2 LSB, can only be reduced with more bits
   C. Fixed 1 V
   D. Zero
   Answer: B. It is inherent. (Key point: Quantisation)

3. When does aliasing occur?
   A. With offset
   B. Above twice
   C. Sampling rate below twice the highest input frequency
   D. Large INL
   Answer: C. Nyquist violation. (Key point: Aliasing)

4. Glitches in a DAC occur at?
   A. Full scale only
   B. Zero code
   C. Never
   D. Major carry e.g. 0111 1111 to 1000 0000
   Answer: D. Switches change at different times. (Key point: Glitch)

## Related in Instrumentation II

- [DNL and INL errors in ADC and DAC](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Adnl-inl) — Instrumentation II, chapter 4, asked 2×
- [Characteristics of ADC and DAC](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aadc-dac-characteristics) — Instrumentation II, chapter 4, asked 2×
- [Static and dynamic errors in DAC](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Adac-static-dynamic-errors) — Instrumentation II, chapter 4

## Related in other subjects

- [Counter-type ADC numerical (VFS = 12 V)](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Acounter-adc-12v-numerical) — Advanced Electronics, chapter 3
- [Dual slope ADC block diagram; integral linearity](https://www.bctengineer.com/question.md?key=semester_4%2Fadvanced_electronics%3Adual-slope-integral-linearity) — Advanced Electronics, chapter 3