--- title: "Interfacing ADC0808 with 8085 using 8255A" subject: "Instrumentation II" chapter: 4 key: "semester_5/instrumentation_ii:adc0808-8255-interface" source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/adc0808-8255-interface site: BCT Engineering --- # Interfacing ADC0808 with 8085 using 8255A Instrumentation II · Chapter 4: Interfacing A/D And D/A Converters - Asked in: 2078 Kartik, 2+6 marks - Video: [Interfacing of ADC-0808 with 8085](https://www.youtube.com/watch?v=AnJD9xIluH4) — EEE LECTURES TKMCE - Answer checked by Claude Sonnet 5.5 on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/adc0808-8255-interface - Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-4 ## Question What are the parameters to characterize ADCs? Design a circuit to interface ADC0808 with 8085 microprocessor using 8255A PPI. ## Short answer Key ADC parameters: resolution, conversion time, accuracy (INL/DNL), quantization error, input range, and reference voltage. For interface, 8255 port A reads ADC data, port B outputs channel address; PC4=START, PC5=ALE, PC6=OE, PC0=EOC. Control word 91H; wait for EOC then read data. ## Answer #### Parameters that characterise ADCs 1. **Resolution** (n bits): LSB = FSR / 2^n. 2. **Conversion time** and maximum sampling rate. 3. **Accuracy / total error,** including offset, gain error, INL, DNL, missing codes. 4. **Quantisation error** (+/-1/2 LSB). 5. **Input voltage range** and input impedance; unipolar or bipolar. 6. **Reference voltage** and its stability; temperature drift. 7. **Number of input channels,** power supply, logic compatibility and output format (tri-state latches). 8. **Aperture time, SNR and ENOB,** power consumption. #### Design: ADC0808 with 8085 using 8255A ADC0808: 8-bit successive approximation ADC, 8-channel multiplexer, conversion time about 100 us at 640 kHz clock. Pins: ADD A, B, C (channel), ALE, START, EOC, OE, CLK, Vref+, Vref-, D0-D7. Assumptions: 8255 I/O mapped at 80H-83H; port A = ADC data (input); port B = channel address (PB0-PB2) and spare outputs; PC4 = START, PC5 = ALE, PC6 = OE (outputs); PC0 = EOC (input). ```text 8085 8255A ADC0808 AD0-AD7 -----> D0-D7 IOR',IOW' -> RD',WR' A7..A2 decode -> CS' ; A0,A1 -> A0,A1 PA0-PA7 <---------------- D0-D7 PB0-PB2 ----------------> ADD A, B, C PC4 --------------------> START PC5 --------------------> ALE PC6 --------------------> OE PC0 <-------------------- EOC CLK OUT -> divider -> 640 kHz -> CLK of ADC Vref+ = 5 V, Vref- = 0 ; analog inputs IN0-IN7 ``` Addresses: Port A = 80H, B = 81H, C = 82H, control = 83H. Control word: A input, B output, C upper output, C lower input: **91H**. #### Operation and program (channel in register C) 1. Output the channel number to port B. 2. Pulse ALE (PC5) to latch it; pulse START (PC4) to begin conversion. 3. Wait for EOC (PC0) to become 1. 4. Set OE (PC6) and read port A. ```text MVI A,91H OUT 83H MOV A,C ; channel number 0-7 OUT 81H MVI A,30H ; ALE = 1, START = 1 OUT 82H MVI A,00H OUT 82H ; falling edge begins conversion WAIT: IN 82H ANI 01H ; EOC JZ WAIT MVI A,40H ; OE = 1 OUT 82H IN 80H ; digital data in A MOV B,A MVI A,00H OUT 82H HLT ``` ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. For an n-bit ADC, how is the LSB (resolution step) found? A. FSR x 2^n B. FSR / n C. FSR / 2^n D. FSR / (2n) Answer: C. LSB = FSR / 2^n, e.g. 5 V / 256 = 19.5 mV for 8 bits. (Key point: Resolution) 2. With port A input, port B output, upper C output and lower C input, what is the control word? A. 91H B. 90H C. 81H D. 99H Answer: A. 1001 0001 = 91H. (Key point: Control word) 3. What is the order of operations for one conversion? A. Read port A, then START, then ALE B. Output channel to port B, pulse ALE and START, wait for EOC, then set OE and read port A C. Set OE, then output channel D. Wait for EOC before START Answer: B. The channel is latched by ALE, START begins conversion, EOC signals completion, and OE releases the data. (Key point: Operation sequence) 4. How is the 640 kHz ADC clock obtained? A. From the keyboard B. From the analog input C. From port A D. From the 8085 CLK OUT through a divider Answer: D. CLK OUT is divided down to about 640 kHz, giving roughly 100 us conversion time. (Key point: Clock) ## Related in Instrumentation II - [8-channel ADC interface with 8255 and 8085](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aadc8-8255-problem) — Instrumentation II, chapter 4 - [Keyboard and printer with 8255A at 4044H](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Akbd-printer-ppi-4044h) — Instrumentation II, chapter 2 - [Centronics printer with 8255A in mode 1](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Acentronics-printer-8255-mode1) — Instrumentation II, chapter 2 - [Interfacing: 512-byte RAM with 8085](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Arag-ram-512-interface) — Instrumentation II, chapter 2 - [Interfacing 8-channel 8-bit ADC with 8085](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aadc0808-8channel) — Instrumentation II, chapter 4 - [8255A card at F3H with keyboard and display](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Appi-f3h-keyboard-display) — Instrumentation II, chapter 2 ## Related in other subjects - [How interrupts interface with microprocessor](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Ainterrupt-interface-microprocessor) — Embedded System, chapter 5 - [Memory capacity from range and interfacing](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Amemory-range-capacity-interfacing) — Microprocessor, chapter 4 - [Interface circuit with 2 RAMs and 2 ROMs](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Ainterface-circuit-16bit-ram-rom) — Embedded System, chapter 5 - [Interface 4 KB EPROM and two 2 KB RAM](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterface-4kb-eprom-two-2kb-ram) — Microprocessor, chapter 4