--- title: "Asynchronous serial transfer of a character" subject: "Instrumentation II" chapter: 3 key: "semester_5/instrumentation_ii:async-7bit-ascii-2stop" source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/async-7bit-ascii-2stop site: BCT Engineering --- # Asynchronous serial transfer of a character Instrumentation II · Chapter 3: Serial Interfacing With Microprocessor Based System - Asked in: 2075 Chaitra, 4 marks - Video: [L-4.7 Asynchronous Serial Data Transfer | Computer Architecture | COA | CSA | Shanu Kuttan](https://www.youtube.com/watch?v=veE-JBSl7Bg) — Shanu Kuttan CSE Classes - Answer checked by Claude Sonnet 5.5 on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/async-7bit-ascii-2stop - Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-3 ## Question Explain the transferring of serial data using asynchronous transfer. One character is formed with 7-bit ASCII code, 1-bit start, 2-bit stop and 1-bit parity. ## Short answer In asynchronous transfer, each character is framed with a start bit (low), 7 data bits (LSB first), a parity bit, and two stop bits (high). The receiver synchronizes on the falling edge and samples at mid-bit; no common clock, but baud rates must match. Frame efficiency is 7/11. ## Answer In **asynchronous serial transfer** each character is sent as a separate frame with no common clock; the sender and receiver use the same baud rate and synchronise at the start of every character with a start bit. #### Frame format (given) Idle line = logic 1 (mark). Frame: 1 start bit (0) + 7 data bits (LSB first) + 1 parity bit + 2 stop bits (1) = **11 bits**. #### Example: character "A" (ASCII 41H = 1000001), even parity Data bits 1000001 contain two 1s, so the even parity bit = 0. Sent LSB first: D0 = 1, D1 to D5 = 0, D6 = 1. ```text id st D0 D1 D2 D3 D4 D5 D6 P S1 S2 id 1 0 1 0 0 0 0 0 1 0 1 1 1 ----\___/---\___________________/---\___/----------- ``` #### Operation 1. The UART transmitter loads the character into a shift register and adds the start bit, parity bit and stop bits. 2. It shifts the bits out at the baud rate (bit time = 1/baud). 3. The receiver detects the falling edge (idle to start), waits half a bit time to check that the line is still low, and then samples each bit in the middle (using a 16x clock). 4. It checks the parity and that the stop bits are 1, removes the framing bits and stores the 7-bit character. It flags a parity error, framing error or overrun error if something is wrong. 5. The line then stays at the idle 1 state until the next start bit. #### Efficiency 7 information bits out of 11 = 63.6%. The two stop bits give the receiver more time to prepare for the next character (needed for slow, electromechanical devices). ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. How many bits in the frame? A. 12 B. 11 C. 10 D. 9 Answer: B. 1 start + 7 data + 1 parity + 2 stop = 11. (Key point: Frame length) 2. Even parity bit for 1000001 (two 1s)? A. Undefined B. 1 C. 0 D. Depends on stop bits Answer: C. Two ones is already even, so parity is 0. (Key point: Parity) 3. How does the receiver synchronise? A. Detects the falling edge of the start bit and samples mid-bit B. Uses CRC C. Waits for SYNC characters D. Uses a shared clock line Answer: A. It waits half a bit time and samples each bit in the middle. (Key point: Receiver) 4. Efficiency of this frame? A. 7/8 B. 100% C. 50% D. 7/11 = 63.6% Answer: D. 7 information bits out of 11. (Key point: Efficiency) ## Related in Instrumentation II - [Bit rate, baud rate and character time at 9600](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Abaud-time-engineer) — Instrumentation II, chapter 3 - [Character transmission time at 1200 baud](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Abaud-time-1200) — Instrumentation II, chapter 3, asked 2× - [RS-232C importance; time to transmit a string at 4800 baud](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ars232c-string-time-4800) — Instrumentation II, chapter 3 - [Why serial transfer is preferred over parallel](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aserial-vs-parallel-preferred) — Instrumentation II, chapter 3 - [Error detection in serial data transmission](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aserial-error-detection) — Instrumentation II, chapter 3, asked 2× ## Related in other subjects - [8085 ALP: odd parity transfer with bit change](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aalp-8085-odd-parity-transfer) — Microprocessor, chapter 2 - [Synchronous vs asynchronous serial transmission](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Async-async-serial) — Microprocessor, chapter 4, asked 3× - [Sending images over 7-bit ASCII SMTP](https://www.bctengineer.com/question.md?key=semester_7%2Fcomputer_networks_and_security%3Asmtp-images-mime) — Computer Networks and Security, chapter 6 - [3-bit even parity generator and 4-bit checker](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Aparity-generator-checker) — Digital Logic, chapter 4