---
title: "ISA bus signals; replacement by PCI bus"
subject: "Instrumentation II"
chapter: 2
key: "semester_5/instrumentation_ii:isa-pci-bus"
source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/isa-pci-bus
site: BCT Engineering
---

# ISA bus signals; replacement by PCI bus

Instrumentation II · Chapter 2: Parallel Interfacing With Microprocessor Based System

- Asked in: 2072 Kartik, 3 marks
- Answer checked by Claude Sonnet 5.5 on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/isa-pci-bus
- Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-2

## Question

List the control signals used by the ISA bus. Provide convincing arguments to justify the replacement of the ISA bus by the PCI bus. Calculate the bandwidth of a 64 bit PCI bus operating at 66 MHz.

## Short answer

ISA control signals include MEMR/W, IOR/W, BALE, AEN, IRQs, DRQs, DACKs, etc. PCI replaced ISA due to higher speed (up to 528 MB/s), plug-and-play, bus mastering, and multiplexed address/data. Bandwidth of 64-bit PCI at 66 MHz is 8 bytes × 66 MHz = 528 MB/s.

## Answer

#### Control signals of the ISA bus
- **MEMR', MEMW'** (memory read/write, full 1 MB), **SMEMR', SMEMW'** (memory below 1 MB).
- **IOR', IOW'** (I/O read/write).
- **BALE** (address latch enable), **AEN** (address enable, high during DMA).
- **I/O CH RDY** (wait state request), **0WS'** (zero wait states).
- **IRQ2-IRQ15** (interrupt requests), **DRQ0-7** (DMA requests), **DACK0-7'** (DMA acknowledge), **T/C** (terminal count).
- **RESET DRV**, **CLK**, **OSC**, **REFRESH'**, **IOCS16'**, **MEMCS16'**, **MASTER'**, **SBHE'**.

#### Why PCI replaced ISA
1. **Speed:** ISA is 8 MHz, 16-bit (about 8 MB/s real); PCI is 32/64 bit at 33/66 MHz (132-528 MB/s).
2. **Plug and play:** PCI has automatic configuration; ISA needs jumpers/switches and manual IRQ/DMA settings.
3. **Processor independent** (host bridge) and supports bus mastering with burst transfers.
4. **Multiplexed address/data** lines reduce pin count and cost.
5. **Shared interrupts,** 3.3 V/5 V support, parity error checking.
6. Higher throughput is needed for graphics, disks and networks.

#### Bandwidth of 64-bit PCI at 66 MHz
Bandwidth = bus width in bytes x clock = (64 / 8) x 66 x 10^6 = 8 x 66 MB/s = **528 MB/s** (= 4224 Mbit/s), peak value, with one data transfer in every clock in burst mode.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Which ISA control signals read and write I/O ports?
   A. MEMR' and MEMW'
   B. IOR' and IOW'
   C. BALE and AEN
   D. DRQ and DACK'
   Answer: B. IOR'/IOW' are I/O read/write; MEMR'/MEMW' are for memory. (Key point: ISA I/O signals)

2. Which is a reason PCI replaced ISA?
   A. PCI is faster and has plug-and-play automatic configuration
   B. PCI needs jumpers for IRQ and DMA
   C. PCI has fewer devices supported
   D. PCI is limited to 8 bits
   Answer: A. ISA is slow (about 8 MB/s) and needs manual jumper settings. (Key point: Reason for PCI)

3. What is the peak bandwidth of a 64-bit PCI bus at 66 MHz?
   A. 528 MB/s
   B. 66 MB/s
   C. 264 MB/s
   D. 132 MB/s
   Answer: A. (64/8) bytes x 66 MHz = 8 x 66 = 528 MB/s. (Key point: Bandwidth)

## Related in Instrumentation II

- [PCI bus; 8255 printer interface at 5500H](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Apci-printer-5500h) — Instrumentation II, chapter 2
- [PCI bus in brief](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Apci-bus) — Instrumentation II, chapter 2, asked 2×
- [Short introduction to ISA bus](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aisa-bus) — Instrumentation II, chapter 2
- [USB signals and bus states](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ausb-signals-bus-states) — Instrumentation II, chapter 3
- [Case study: feasibility, drawbacks, convincing](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Acs-2072kartik-feasibility) — Instrumentation II, chapter 10
- [10-bit DAC triangular wave at 500 Hz](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Adac10-triangular-500hz) — Instrumentation II, chapter 4

## Related in other subjects

- [PCM bit rate for 4.5 MHz TV signal with 1024 levels](https://www.bctengineer.com/question.md?key=semester_6%2Fcommunication_systems%3Apcm-tv-4-5mhz-1024) — Communication Systems, chapter 4
- [TDM of 24 voice signals: PAM bandwidth and PCM sampling rate](https://www.bctengineer.com/question.md?key=semester_6%2Fcommunication_systems%3Atdm-24-voice-pam-pcm) — Communication Systems, chapter 5
- [Direct mapping with 64-block memory, 10 blocks used](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example-64) — Computer Organization and Architecture, chapter 6, asked 3×
- [ISA bus protocols](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aisa-bus-protocols) — Embedded System, chapter 5