--- title: "8255 mode 2 operation with timing diagram" subject: "Instrumentation II" chapter: 2 key: "semester_5/instrumentation_ii:ppi-mode2" source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/ppi-mode2 site: BCT Engineering --- # 8255 mode 2 operation with timing diagram Instrumentation II · Chapter 2: Parallel Interfacing With Microprocessor Based System - Asked in: 2072 Chaitra, 3+3+2 marks - Video: [Control Word and Modes of 8255: BSR Mode, IO Modes, and Detailed Mode 0, 1, & 2](https://www.youtube.com/watch?v=la-EoWUcSp4) — Engineering Funda - Answer checked by Claude Sonnet 5.5 on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/ppi-mode2 - Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-2 ## Question With a neat timing diagram and an appropriate example, explain the operation of 8255 PPI in mode 2. You should clearly show the necessary control signals and an interfacing circuit to connect 8255PPI to 8085 microprocessor. Also write the necessary control words to configure the 8255 in this fashion. ## Short answer Mode 2 is the bidirectional bus mode for port A only, using PC3–PC7 for handshaking (OBF_A', ACK_A', IBF_A, STB_A', INTR_A). Control word C0H configures port A in mode 2 with port B mode 0 output; BSR 0DH and 09H enable output and input interrupts. Data output uses WR' and ACK_A'; input uses STB_A' and RD'. ## Answer **Mode 2** is the **bidirectional bus mode** of the 8255. It is available only for port A (8 lines PA0-PA7). The same eight lines are used for both input and output, and five lines of port C (PC3-PC7) are used for handshaking. Port B can be in mode 0 or mode 1. #### Control signals (port A, mode 2) | Pin | Signal | Meaning | |---|---|---| | PC7 | OBF_A' | Output buffer full: CPU wrote data, peripheral may read | | PC6 | ACK_A' | Peripheral acknowledge: enables the output buffer onto PA0-PA7 | | PC5 | IBF_A | Input buffer full: data latched from peripheral | | PC4 | STB_A' | Strobe from peripheral to load the input latch | | PC3 | INTR_A | Interrupt request to CPU for both input and output | INTE1 (PC6 bit set) enables the output interrupt, and INTE2 (PC4 bit set) enables the input interrupt. #### Operation and timing **Output:** the CPU writes data to port A. The rising edge of WR' makes OBF_A' low (data ready). The peripheral pulls ACK_A' low; this opens the output buffer so the data appear on PA0-PA7, and OBF_A' goes high again. When ACK_A' returns high, INTR_A is set (if INTE1 = 1). The next falling edge of WR' clears it. **Input:** the peripheral sends data with STB_A' low; the data are latched and IBF_A goes high. When STB_A' returns high, INTR_A goes high (if INTE2 = 1). The CPU then reads port A: INTR_A goes low when RD' falls and IBF_A goes low when RD' rises. Output timing (Z = high impedance): ```text WR' ----\__/------------------------ OBF' --------\_________/------------- ACK' ------------------\____/-------- PA ZZZZZZZZZZZZZZZZZZZZZZZZZZ INTR _______________________/-------- ``` Input timing: ```text PA --< data from peripheral >------ STB' -----\____/--------------------- IBF _____/----------------\_________ INTR __________/------\______________ RD' -----------------\____/--------- ``` #### Interfacing circuit with 8085 (I/O mapped, ports 80H-83H) ```text 8085 AD0-AD7 -> 74LS373 -> A0,A1 -> 8255 A0,A1 AD0-AD7 ----> D0-D7 of 8255 (via data lines) A7=1, A6-A2=0 decoder -> CS' ; IOR' -> RD' ; IOW' -> WR' RESET OUT -> RESET PA0-PA7 <-> peripheral data bus PC7 OBF', PC6 ACK', PC5 IBF, PC4 STB' <-> peripheral PC3 INTR_A -> RST 5.5 / INTR of 8085 ``` #### Control word (mode 2, port B mode 0 output) D7 = 1, D6 D5 = 1 x (mode 2), D4 = x, D3 = x, D2 = 0 (B mode 0), D1 = 0 (B output), D0 = x. With x = 0: 1100 0000 = **C0H**. If port B is mode 1 output: 1100 0100 = C4H. To enable the interrupts: BSR **0DH** (set PC6, INTE1) and **09H** (set PC4, INTE2). #### Example Data transfer between two microcomputers over a common 8-bit bus, or to a floppy disk controller, where the CPU sends commands and receives data through the same eight lines. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What is special about 8255 mode 2? A. It is available on all ports B. It is a bit set/reset mode C. It is output-only with no handshake D. Bidirectional bus on port A only, with five port C lines for handshake Answer: D. Mode 2 uses PA0-PA7 for both input and output and PC3-PC7 for control. (Key point: Mode 2 meaning) 2. In mode 2, which signal enables the output buffer onto PA0-PA7? A. STB_A' (PC4) B. IBF_A (PC5) C. ACK_A' (PC6) from the peripheral D. INTR_A (PC3) Answer: C. The peripheral's ACK' turns on the output tri-state so data appears on the port. (Key point: Control signals) 3. What is the control word for mode 2 with port B mode 0 output (x = 0)? A. 80H B. A0H C. C0H D. C4H Answer: C. 1 1x x x 0 0 x with x = 0 gives 1100 0000 = C0H. (Key point: Control word) 4. How is the input interrupt (INTE2) enabled in mode 2? A. BSR set of PC6 (word 0DH) B. BSR set of PC4 (word 09H) C. BSR set of PC3 D. Control word C0H alone Answer: B. INTE2 is PC4, set by BSR 09H; INTE1 (output) is PC6 by 0DH. (Key point: Interrupt enables) ## Related in Instrumentation II - [8255 at A0A0H: interface and control words](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Appi-a0a0h-control-words) — Instrumentation II, chapter 2 - [Double handshake data transfer with 8255-PPI](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Adouble-handshake-8255) — Instrumentation II, chapter 2 - [8-channel ADC interface with 8255 and 8085](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aadc8-8255-problem) — Instrumentation II, chapter 4 - [ADC with 8085 using 8255: fan and heater control](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aadc-8255-fan-heater) — Instrumentation II, chapter 4 - [Centronics printer with 8255A in mode 1](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Acentronics-printer-8255-mode1) — Instrumentation II, chapter 2 - [8255 mode 1 keyboard and printer with decoding](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Appi-keyboard-printer-mode1-fig) — Instrumentation II, chapter 2 ## Related in other subjects - [PID control operation with block diagram](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Apid-operation-block-diagram) — Embedded System, chapter 7, asked 4× - [Modes of operation of 8255](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8255-modes) — Microprocessor, chapter 4 - [Timing diagram of STA 8050H](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Atiming-sta-8050h) — Microprocessor, chapter 2 - [Characteristics and signals of 8085](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-characteristics-signals) — Microprocessor, chapter 2