---
title: "Routing rules for crosstalk and impedance matching"
subject: "Instrumentation II"
chapter: 8
key: "semester_5/instrumentation_ii:rules-mismatch-crosstalk"
source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/rules-mismatch-crosstalk
site: BCT Engineering
---

# Routing rules for crosstalk and impedance matching

Instrumentation II · Chapter 8: Circuit Layout

- Asked in: 2070 Asar, 6 marks; 2070 Chaitra, 3 marks; 2069 Chaitra, 3+3 marks (asked 3 times)
- Video: [How To Solve Capacitive and Inductive Crosstalk in Your Design - Altium Academy](https://www.youtube.com/watch?v=BX5KA3dKJMs) — Altium Academy
- Answer checked by Claude Sonnet 5.5 on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/rules-mismatch-crosstalk
- Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-8

## Question

How can cross talk be minimized during routing the signal trace in PCB, Describe with trace impedance matching techniques.

## Short answer

Minimise crosstalk by increasing spacing (3W rule), limiting parallel lengths, routing orthogonally, and using guard traces. For impedance matching, maintain constant trace geometry to achieve target Z0 (e.g. 50Ω), and add termination: series resistor near driver or parallel resistor at receiver end to absorb reflections.

## Answer

#### Minimising crosstalk during routing
- Keep spacing at least 3W (centre to centre) between traces; the larger the spacing the lower the coupling capacitance and inductance.
- Keep parallel runs short; route adjacent layers at right angles.
- Keep traces close to the ground plane (small dielectric height) so the field is confined.
- Use ground guard traces with stitching vias between critical signals.
- Slow the edge rates with series resistors where timing allows; use differential signalling for noisy lines.
- Separate analog and digital and clock circuits; keep sensitive lines short.

#### Trace impedance matching techniques
Impedance matching prevents reflection on high-speed traces.

1. **Controlled-impedance routing:** characteristic impedance Z₀ depends on the trace width (w), copper thickness (t), dielectric height (h) and dielectric constant (εr). For a microstrip, Z₀ ≈ 87/√(εr + 1.41) · ln(5.98h/(0.8w + t)). Choose w and h in the stack-up to obtain the target (e.g. 50 ohm single-ended, 100 ohm differential), and keep these constant along the trace.
2. **Termination:**
   - **Series (source) termination:** a resistor R_s = Z₀ - R_out in series near the driver; the line load is high-impedance. Low power, suitable for a single point-to-point load.
   - **Parallel (end) termination:** resistor R = Z₀ from the receiver end to ground (or Vcc); good for multiple loads but dissipates DC power.
   - **Thevenin termination:** two resistors (R1 ∥ R2 = Z₀) to Vcc and ground.
   - **AC termination:** resistor R = Z₀ in series with a capacitor to ground, which reduces power.
3. **Avoid discontinuities:** no stubs, minimal vias, smooth bends, uniform width, no plane splits and matched connector impedance.
4. **Differential pairs:** keep constant spacing and equal lengths for matched impedance.

```text
 Series:   Drv --[Rs]------------------- Rcv
 Parallel: Drv ------------------+------ Rcv
                                 [R=Z0]
                                  GND
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is the series (source) termination resistor value?
   A. R_s = Z0 + R_out
   B. R_s = Z0 - R_out, placed near the driver
   C. R_s = 2·Z0
   D. R_s = Z0 to ground at the receiver
   Answer: B. Driver resistance plus R_s equals Z0; it is low power and suited to a single point-to-point load. (Key point: Series termination)

2. What is the drawback of parallel (end) termination with R = Z0?
   A. It dissipates DC power
   B. It does not work with multiple loads
   C. It increases reflections
   D. It needs a series capacitor
   Answer: A. The resistor to ground or Vcc draws DC current, though it suits multiple loads. (Key point: Parallel termination)

3. What does AC termination use to reduce power?
   A. A resistor R = Z0 in series with a capacitor to ground
   B. A resistor to Vcc only
   C. A series inductor
   D. Two resistors with R1 + R2 = Z0
   Answer: A. The capacitor blocks DC so no static power is dissipated. (Key point: AC termination)

4. Which parameters set microstrip Z0?
   A. Only length
   B. Trace width, copper thickness, dielectric height and dielectric constant
   C. Only supply voltage
   D. Silkscreen thickness
   Answer: B. Choose w and h in the stack-up for the target (e.g. 50 ohm) and keep them constant. (Key point: Controlled impedance)

## Related in Instrumentation II

- [Reducing crosstalk in PCB routing](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Acrosstalk-routing) — Instrumentation II, chapter 8, asked 5×
- [Ground bounce, crosstalk, impedance matching, skew](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Abounce-crosstalk-skew) — Instrumentation II, chapter 7
- [Factors while routing signal traces on PCB](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aroute-factors) — Instrumentation II, chapter 8, asked 4×
- [Routing factors and avoiding crosstalk](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aroute-factors-crosstalk) — Instrumentation II, chapter 8
- [Impedance matching and discontinuities](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aimpedance-matching-discontinuity) — Instrumentation II, chapter 7
- [Terminologies in routing signal traces](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Arouting-terminologies) — Instrumentation II, chapter 8

## Related in other subjects

- [Impedance matching techniques](https://www.bctengineer.com/question.md?key=semester_3%2Felectromagnetism%3Aimpedance-matching-quarter-wave-stub) — Electromagnetism, chapter 5, asked 3×
- [Matching techniques and double-stub S-matrix](https://www.bctengineer.com/question.md?key=semester_7%2Frf_and_microwave_engineering%3Amatching-techniques-double-stub-smatrix) — RF and Microwave Engineering, chapter 2
- [CE small-signal model, gain and input impedance](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Ace-small-signal-gain-input-impedance) — Electronics Devices and Circuit, chapter 2