---
title: "Unique vs non-unique address decoding"
subject: "Instrumentation II"
chapter: 2
key: "semester_5/instrumentation_ii:unique-vs-nonunique-decoding"
source: https://www.bctengineer.com/q/semester_5/instrumentation_ii/unique-vs-nonunique-decoding
site: BCT Engineering
---

# Unique vs non-unique address decoding

Instrumentation II · Chapter 2: Parallel Interfacing With Microprocessor Based System

- Asked in: 2072 Chaitra, 4 marks
- Video: [Address Decoding](https://www.youtube.com/watch?v=nOMyv79cqKQ) — AAkrit Subedi
- Answer checked by Claude Sonnet 5.5 on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_5/instrumentation_ii/unique-vs-nonunique-decoding
- Whole chapter: https://www.bctengineer.com/md/semester_5/instrumentation_ii/chapter-2

## Question

Differentiate unique vs non unique address decoding.

## Short answer

Unique decoding uses all higher address lines to generate CS', giving each location a single address. Non-unique decoding uses only some lines, causing foldback images. Unique decoding avoids bus conflicts and wastes no address space, but requires more hardware.

## Answer

In **unique (full / absolute) decoding** all the higher address lines (those not used inside the chip) take part in generating the chip select, so every memory location or port has exactly one address. In **non-unique (partial / linear) decoding** only some of the higher lines are decoded, so the same location responds to several addresses (foldback or image addresses).

| Point | Unique (full) decoding | Non-unique (partial) decoding |
|---|---|---|
| Address lines decoded | All remaining lines | Only some lines |
| Address of a location | One unique address | Several addresses (images) |
| Hardware | More gates / larger decoder | Less hardware, lower cost |
| Address space | Fully usable, no waste | Wastes address space; limits expansion |
| Future expansion | Easy | Difficult (conflicts) |
| Bus conflict risk | None | Possible if overlapping devices |
| Example (8085, 2K RAM) | A15-A11 = 00000 all decoded: 0000H-07FFH only | Only A15 decoded: 0000H-07FFH, and images at 0800H-0FFFH, ... up to 7FFFH |
| Use | Large systems, memory | Small systems with few devices |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In unique (full) decoding, how many addresses does each location have?
   A. Several, due to images
   B. Two
   C. Exactly one
   D. None; it uses no address
   Answer: C. All higher lines take part in CS', so each location has a single address. (Key point: Unique decoding)

2. Why do image (foldback) addresses appear in non-unique decoding?
   A. All lines are decoded twice
   B. Only some higher address lines are decoded, so the others are don't-care
   C. The chip has two chip selects
   D. The data bus is shared
   Answer: B. Undecoded lines can take any value, so the same location responds at several addresses. (Key point: Non-unique decoding)

3. What is an advantage of non-unique decoding?
   A. Easy future expansion
   B. Less hardware and lower cost
   C. No wasted address space
   D. No risk of bus conflict
   Answer: B. Fewer gates are needed, but at the cost of address space and expansion. (Key point: Trade-off)

4. Why is future expansion difficult with non-unique decoding?
   A. Image addresses waste space and overlapping devices can conflict
   B. It needs more data lines
   C. It cannot use RAM
   D. Decoders cannot be added
   Answer: A. Because locations occupy many addresses, adding devices may overlap them. (Key point: Expansion)

## Related in Instrumentation II

- [Full vs partial address decoding for memory](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Afull-vs-partial-decoding) — Instrumentation II, chapter 2

## Related in other subjects

- [Unique/non-unique decoding, memory mapped I/O](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aunique-nonunique-decoding-memory-mapped-io) — Microprocessor, chapter 4
- [Address decoding with PROM decoder](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aaddress-decoding-prom) — Microprocessor, chapter 4
- [Address decoding for 8 LEDs output port](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Adecoder-output-port-8-leds) — Microprocessor, chapter 4
- [Address decoding for input and output ports](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Adecoder-input-output-port-block-decoder) — Microprocessor, chapter 4