--- title: "Sample and hold: tracking and hold modes" subject: "Digital Control System" chapter: 1 key: "semester_6/digital_control_system:sample-hold-tracking-hold" source: https://www.bctengineer.com/q/semester_6/digital_control_system/sample-hold-tracking-hold site: BCT Engineering --- # Sample and hold: tracking and hold modes Digital Control System · Chapter 1: Introduction to Discrete Time Control System - Asked in: 2082 Chaitra (new course), 3 marks; 2075 Bhadra, 8 marks; 2071 Magh, 8 marks (asked 3 times) - Video: [Sample and Hold Circuit](https://www.youtube.com/watch?v=bwPh7oDjHUo) — AK ECE - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_6/digital_control_system/sample-hold-tracking-hold - Whole chapter: https://www.bctengineer.com/md/semester_6/digital_control_system/chapter-1 ## Question What do you mean by sample and hold circuit? Explain how tracking and hold mode are employed in digital control system. ## Answer A **sample-and-hold (S/H) circuit** takes the value of an analog signal at a sampling instant and holds it constant for the time the A/D converter needs to convert it. Without an S/H, the input could change during conversion and give a wrong digital output. #### Circuit ```text Switch S Vin --[Buf A1]--o/ o--+--[Buf A2]--> Vout | === C (hold capacitor) | GND Control (sample/hold) drives switch S ``` - **A1:** input buffer with low output impedance, so C charges quickly. - **S:** electronic switch (FET/MOSFET) driven by the control (logic) signal. - **C:** hold capacitor that stores the voltage. - **A2:** output buffer with very high input impedance, so C does not discharge. #### Tracking (sample) mode - The control signal **closes** the switch. - C charges through A1, and the output **follows (tracks)** the input: $V_{out}(t) \approx V_{in}(t)$. - The time needed for the output to reach the input within the stated accuracy is the **acquisition time**. #### Hold mode - The control signal **opens** the switch at the sampling instant. - C keeps the voltage it had at that instant. A2 draws almost no current, so $V_{out}$ stays constant. - The A/D converter converts this steady voltage during the hold period. ```text Ctrl: |-- track --|-- hold --|-- track --|-- hold --| Vout: follows Vin constant follows Vin constant ``` #### Use in digital control 1. At each sampling instant $kT$ the controller switches the S/H to hold and starts the ADC. 2. After conversion it returns the S/H to track mode, so it follows the signal until the next instant. 3. In a multichannel data acquisition system, one S/H after the multiplexer holds each channel in turn; at the output, hold circuits (ZOH) keep each D/A output constant between updates. #### Important non-ideal terms - **Aperture time:** delay between the hold command and the switch actually opening. - **Droop:** slow fall of the held voltage due to leakage current, $dV/dt = I_{leak}/C$. - **Feedthrough:** small part of the input appearing at the output during hold. Mathematically, the S/H acts as an ideal sampler followed by a zero order hold, $G_{h0}(s) = \frac{1-e^{-Ts}}{s}$. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. What problem would occur without a sample-and-hold ahead of the A/D converter? A. The signal would be too small B. The input could change during conversion and give a wrong digital output C. The converter would produce analog output D. The multiplexer would fail Answer: B. The S/H keeps the input steady for the conversion time. (Key point: Need for S/H) 2. In tracking (sample) mode, what is the state of the switch and the output? A. Switch open, output constant B. Switch open, output zero C. Switch closed, output follows the input D. Switch closed, output constant Answer: C. With the switch closed, C charges through A1 and Vout follows Vin. (Key point: Tracking mode) 3. Why is the output buffer A2 chosen with very high input impedance? A. So C charges quickly B. So the capacitor is not discharged during hold C. So that the switch closes faster D. So the input is amplified Answer: B. A2 draws almost no current, so the capacitor holds its voltage. (Key point: Why A2 has high input impedance) 4. What does droop mean in a sample-and-hold circuit? A. Delay between the hold command and the switch opening B. Part of the input appearing at the output during hold C. Slow fall of the held voltage due to leakage, dV/dt = I_leak/C D. Time for output to reach the input in tracking mode Answer: C. Leakage current discharges C slowly; the others are aperture time, feedthrough and acquisition time. (Key point: Droop) ## Related in Digital Control System - [Data acquisition system and tracking/hold modes](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Adata-acquisition-tracking-hold) — Digital Control System, chapter 1 - [DCS block diagram and S/H tracking/hold modes](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Adcs-block-diagram-tracking-hold) — Digital Control System, chapter 1 - [Define tracking and hold mode](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Adefine-tracking-hold-mode) — Digital Control System, chapter 1, asked 2× - [Short note: Sample and hold circuit](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Ashort-note-sample-hold) — Digital Control System, chapter 1 - [Sample-and-hold capacitor voltage and advantages](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Asample-hold-capacitor-voltage) — Digital Control System, chapter 1 - [Importance and operation of sample and hold](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Aimportance-of-sample-hold) — Digital Control System, chapter 1 ## Related in other subjects - [Sample and hold circuit](https://www.bctengineer.com/question.md?key=semester_4%2Finstrumentation_i%3Asample-and-hold-circuit) — Instrumentation I, chapter 6 - [Training and tracking modes of adaptive equalizer](https://www.bctengineer.com/question.md?key=semester_7%2Fwireless_communication%3Aadaptive-equalizer-training-tracking) — Wireless Communication, chapter 5 - [Why no TEM mode; first four modes](https://www.bctengineer.com/question.md?key=semester_3%2Felectromagnetism%3Awaveguide-no-tem-four-modes) — Electromagnetism, chapter 6 - [Magic tee, degenerate modes, dominant mode for a = 3b](https://www.bctengineer.com/question.md?key=semester_7%2Frf_and_microwave_engineering%3Amagic-tee-modes-a-3b) — RF and Microwave Engineering, chapter 4