---
title: "Addressing modes of 8051"
subject: "Embedded System"
chapter: 9
key: "semester_6/embedded_system:8051-addressing-modes"
source: https://www.bctengineer.com/q/semester_6/embedded_system/8051-addressing-modes
site: BCT Engineering
---

# Addressing modes of 8051

Embedded System · Chapter 9: Microcontrollers in Embedded Systems

- Asked in: 2071 Magh, 4 marks; 2072 Magh, 4 marks; 2075 Baisakh, 4 marks; 2079 Asoj, 4 marks (asked 4 times)
- Video: [8051 addressing modes | MPMC | Lec-61 | Bhanu Priya](https://www.youtube.com/watch?v=sLbw1stNkXM) — Education 4u
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/8051-addressing-modes
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-9

## Question

Explain the addressing modes used in 8051 microcontroller (with example).

## Short answer

The 8051 uses five data addressing modes: immediate (#data), register (R0-R7, A), direct (RAM/SFR address), register indirect (@R0/@R1, @DPTR for MOVX), and indexed (MOVC with A+DPTR or A+PC). It also supports bit addressing on bit-addressable RAM and SFRs.

## Answer

The addressing mode tells the CPU where the operand of an instruction is. The 8051 has five addressing modes for data, plus bit addressing.

| Mode | Operand is | Example | Meaning |
|---|---|---|---|
| Immediate | a constant in the instruction, marked with # | MOV A,#25H | A = 25H |
| Register | in a register R0-R7 of the active bank (or A, B) | MOV A,R3 | A = R3 |
| Direct | at an 8-bit internal RAM or SFR address | MOV A,30H; MOV P1,A | A = RAM[30H]; P1 = A |
| Register indirect | at the RAM address held in R0 or R1 | MOV A,@R0 | A = RAM[R0] |
| Indexed | in code memory at base + offset | MOVC A,@A+DPTR | A = ROM[DPTR + A] |

#### Details

1. **Immediate:** the data is part of the instruction, e.g. `MOV R2,#10` and `MOV DPTR,#4000H` (16-bit). Used to load constants.
2. **Register:** short and fast (one byte). `ADD A,R5` adds R5 to A. The bank is chosen by bits RS1:RS0 in the PSW.
3. **Direct:** the address is in the instruction, e.g. `MOV 40H,#5` or `MOV A,P1` (P1 is the SFR at 90H). This is the only way to reach the SFRs.
4. **Register indirect:** the register works as a pointer; with `INC R0` the same code walks through an array. External RAM uses `MOVX A,@DPTR` or `MOVX A,@R0`. Only R0 and R1 (and DPTR for MOVX) can be pointers.
5. **Indexed:** used for look-up tables in ROM: `MOVC A,@A+DPTR` or `MOVC A,@A+PC`; also `JMP @A+DPTR`.
6. **Bit addressing:** `SETB P1.0`, `CLR C` and `JB P2.1,LABEL` operate on single bits of the bit-addressable RAM (20H-2FH) and SFRs.

Example (look-up table):
```asm
        MOV DPTR,#TABLE
        MOV A,#3
        MOVC A,@A+DPTR   ; A = 9 (4th table entry, index 3)
HERE:   SJMP HERE        ; stop, so the table is not executed as code
TABLE:  DB 0,1,4,9,16
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does MOV A,#25H do?
   A. Loads the constant 25H into A
   B. Loads the content of RAM address 25H into A
   C. Loads from ROM at 25H
   D. Stores A in address 25H
   Answer: A. The # marks immediate data, the constant itself is in the instruction. (Key point: Immediate mode)

2. Which registers can act as pointers in register indirect addressing for internal RAM?
   A. Any of R0-R7
   B. A and B
   C. R0 and R1 only
   D. SP and PC
   Answer: C. Only R0 and R1 (and DPTR for MOVX) can hold addresses. (Key point: Register indirect)

3. What is MOVC A,@A+DPTR used for?
   A. Reading external RAM
   B. Setting a bit
   C. Writing to ports
   D. Reading look-up table data from code memory
   Answer: D. Indexed addressing reads ROM at base (DPTR) plus offset (A), used for look-up tables. (Key point: Indexed mode)

4. Which addressing mode is the only way to access SFRs such as P1?
   A. Immediate
   B. Direct
   C. Register
   D. Indexed
   Answer: B. SFRs are reached by their 8-bit direct address, e.g. MOV A,P1. (Key point: Direct mode and SFRs)

## Related in Embedded System

- [Microprocessor vs microcontroller; 8051 addressing](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-addressing-modes-micro-vs-processor) — Embedded System, chapter 9
- [Microcontroller vs microprocessor; 8051 features](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Amicro-vs-microprocessor-8051-features) — Embedded System, chapter 9, asked 2×
- [Why 8051 / its operational features](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Awhy-8051-features) — Embedded System, chapter 9, asked 2×

## Related in other subjects

- [Addressing modes in given instructions](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes-8085) — Computer Organization and Architecture, chapter 2
- [Addressing modes with examples](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes) — Computer Organization and Architecture, chapter 2, asked 10×
- [Instruction and data format, addressing modes](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8085-instruction-data-format-addressing) — Microprocessor, chapter 2, asked 2×
- [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2×