---
title: "Arbitration and memory-mapped vs standard I/O"
subject: "Embedded System"
chapter: 5
key: "semester_6/embedded_system:arbitration-memory-mapped-io"
source: https://www.bctengineer.com/q/semester_6/embedded_system/arbitration-memory-mapped-io
site: BCT Engineering
---

# Arbitration and memory-mapped vs standard I/O

Embedded System · Chapter 5: Interfacing

- Asked in: 2069 Bhadra, 8 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/arbitration-memory-mapped-io
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-5

## Question

Explain arbitration systems that are implemented to communicate with peripheral devices from the microprocessor. Differentiate between memory mapped I/O and standard I/O.

## Short answer

Arbitration methods: priority arbitration uses separate Req/Ack lines, granting highest priority; daisy-chain shares Req and passes Grant serially, priority by position; network-oriented (e.g., I2C) uses wired-AND. Memory-mapped I/O places peripheral registers in memory space, accessed with normal instructions; standard I/O uses a separate I/O space and special IN/OUT instructions.

## Answer

#### Arbitration systems
When more than one peripheral wants to be bus master (or to use the bus through the microprocessor) at the same time, an **arbiter** decides which one gets the bus.

**1. Priority arbitration:** the arbiter has a Req/Ack pair for each peripheral and grants the bus to the highest-priority requester (fixed priority, or rotating round-robin priority).
```text
 Req1,2,3 --> [Arbiter] --> Ack1,2,3
```
**2. Daisy-chain arbitration:** the devices share a common Req line and the Grant signal is passed from device to device along a chain; the first requesting device in the chain keeps the grant, so priority depends on position.
```text
 Arbiter --Grant--> Dev1 --> Dev2 --> Dev3
```
**3. Network-oriented arbitration:** used when masters share a network bus (e.g. CAN or Ethernet). Each device checks that the bus is free before sending; collisions are resolved by priority or by retrying.

#### Memory-mapped I/O versus standard I/O
| Point | Memory-mapped I/O | Standard (isolated) I/O |
|---|---|---|
| Address space | Shared with memory | Separate I/O space |
| Instructions | Normal data-transfer instructions | Special IN/OUT instructions |
| Control signals | MEMR/MEMW | IOR/IOW |
| Memory available | Reduced | Full |
| Decoding | Must decode the full memory address width | Simpler; fewer address bits for the small I/O space |
| Number of ports | Large | Limited (e.g. 256) |
| Examples | ARM, MIPS | 8085, 8086 |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How does network-oriented arbitration work?
   A. Each device checks that the bus is free before sending, and collisions are resolved by priority or retry
   B. Devices are assigned fixed time slots only
   C. The first device in a chain keeps the grant
   D. A central arbiter polls each device
   Answer: A. Used on shared network buses such as CAN or Ethernet; devices sense the bus and resolve collisions. (Key point: Network-oriented arbitration)

2. In daisy-chain arbitration, why does priority depend on position?
   A. The first requesting device in the chain keeps the grant, so devices nearer the arbiter win
   B. Each device has a fixed ID
   C. The arbiter rotates grants
   D. Devices closer to memory get priority
   Answer: A. The grant passes serially and is kept by the first requesting device. (Key point: Daisy chain priority)

3. Which is true for memory-mapped I/O compared with standard (isolated) I/O?
   A. It uses special IN/OUT instructions
   B. It leaves full memory available
   C. It shares address space with memory and uses normal data-transfer instructions
   D. It has a separate I/O address space
   Answer: C. Memory-mapped I/O uses MEMR/MEMW and normal instructions, which reduces available memory; isolated I/O uses IN/OUT with IOR/IOW. (Key point: Memory-mapped vs isolated I/O instructions)

4. Which pair is correct about isolated I/O?
   A. No decoder needed
   B. Limited ports (e.g. 256), used by 8085/8086
   C. Large number of ports, used by ARM
   D. Shares memory space, used by MIPS
   Answer: B. Standard I/O has a separate space with limited ports and needs a separate decoder; examples are 8085 and 8086. (Key point: Port count and examples)

## Related in Embedded System

- [Memory mapped versus isolated I/O](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Amemory-mapped-vs-standard-io) — Embedded System, chapter 5, asked 2×
- [Arbitration methods and I2C significance](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aarbitration-types-i2c) — Embedded System, chapter 5
- [Priority arbitration vs daisy chain](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Apriority-arbitration-vs-daisy) — Embedded System, chapter 5
- [Microprocessor vs microcontroller; 8051 addressing](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3A8051-addressing-modes-micro-vs-processor) — Embedded System, chapter 9
- [Microcontroller vs microprocessor; 8051 features](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Amicro-vs-microprocessor-8051-features) — Embedded System, chapter 9, asked 2×

## Related in other subjects

- [Isolated I/O vs memory-mapped I/O](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aisolated-vs-mmio) — Computer Organization and Architecture, chapter 7, asked 2×
- [I/O mapped vs memory mapped I/O](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Aiomapped-vs-memmapped) — Instrumentation II, chapter 2
- [Memory devices; PAL vs PLA](https://www.bctengineer.com/question.md?key=semester_3%2Fdigital_logic%3Apal-vs-pla) — Digital Logic, chapter 4
- [Short note: I/O mapped and memory mapped I/O](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aio-mapped-memory-mapped-io) — Microprocessor, chapter 4
