---
title: "Which cache is better (4KB vs 12KB)"
subject: "Embedded System"
chapter: 4
key: "semester_6/embedded_system:cache-comparison-4kb-12kb"
source: https://www.bctengineer.com/q/semester_6/embedded_system/cache-comparison-4kb-12kb
site: BCT Engineering
---

# Which cache is better (4KB vs 12KB)

Embedded System · Chapter 4: Memory

- Asked in: 2078 Baisakh, 3 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/cache-comparison-4kb-12kb
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-4

## Question

Determine which cache memory is better:

| | Size | Miss Rate | Hit Cost | Miss Cost |
|---|---|---|---|---|
| Cache A | 4KB | 15% | 3 cycles | 25 cycles |
| Cache B | 12KB | 5% | 6 cycles | 25 cycles |

## Short answer

Average access time = hit_rate × hit_cost + miss_rate × miss_cost. Cache A: 0.85×3 + 0.15×25 = 6.30 cycles. Cache B: 0.95×6 + 0.05×25 = 6.95 cycles. Cache A is better with lower average access time.

## Answer

The better cache is the one with the smaller **average memory access time**.

**Formula:** average access cost = (hit rate x hit cost) + (miss rate x miss cost)

#### Cache A (4KB): miss rate 15 %, hit rate 85 %
```text
 = 0.85 x 3 + 0.15 x 25
 = 2.55 + 3.75
 = 6.30 cycles
```
#### Cache B (12KB): miss rate 5 %, hit rate 95 %
```text
 = 0.95 x 6 + 0.05 x 25
 = 5.70 + 1.25
 = 6.95 cycles
```
**Answer: Cache A is better,** with an average access time of 6.30 cycles against 6.95 cycles.

The larger cache B has a slower hit time, but its much lower miss rate does not compensate for it here; the smaller cache A wins. (If miss cost is taken as an extra penalty on top of the hit time, the cost is hit cost + miss rate x miss cost: A = 6.75, B = 7.25; the conclusion is the same.)

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is used to decide which cache is better here?
   A. Cache size alone
   B. Lowest miss rate alone
   C. Average memory access time
   D. Hit cost alone
   Answer: C. The cache with the smaller average memory access time is better. (Key point: Comparison criterion)

2. What is the average access cost of Cache A (hit rate 85%, hit cost 3, miss cost 25)?
   A. 6.30 cycles
   B. 6.95 cycles
   C. 5.30 cycles
   D. 7.50 cycles
   Answer: A. 0.85 x 3 + 0.15 x 25 = 2.55 + 3.75 = 6.30 cycles. (Key point: Cache A calculation)

3. Cache B costs 0.95 x 6 + 0.05 x 25 = 6.95 cycles. What is the conclusion?
   A. B is better because its miss rate is lower
   B. A is better because 6.30 < 6.95
   C. They are equal
   D. B is better because it is larger
   Answer: B. B's lower miss rate does not offset its slower hit time, so A with 6.30 cycles wins. (Key point: Cache B and conclusion)

## Close variants set in other exams

- [Which cache is better (2KB vs 8KB)](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-comparison-2kb-8kb) — Embedded System, chapter 4, asked 2×

## Related in Embedded System

- [Cache memory mapping techniques](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acache-mapping-techniques) — Embedded System, chapter 4, asked 3×

## Related in other subjects

- [LRU replacement with hit and miss](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Alru-replacement) — Computer Organization and Architecture, chapter 6
- [Process to determine wire size](https://www.bctengineer.com/question.md?key=semester_1%2Fbasic_electrical_and_electronics_engineering%3Awire-size-determination) — Basic Electrical and Electronics Engineering, chapter 4
- [Direct mapping with 32-block memory, 8-block cache](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adirect-mapping-example) — Computer Organization and Architecture, chapter 6, asked 3×