---
title: "Compose 2^(k+1) x 2n from 2^k x n"
subject: "Embedded System"
chapter: 4
key: "semester_6/embedded_system:compose-2k1x2n"
source: https://www.bctengineer.com/q/semester_6/embedded_system/compose-2k1x2n
site: BCT Engineering
---

# Compose 2^(k+1) x 2n from 2^k x n

Embedded System · Chapter 4: Memory

- Asked in: 2078 Chaitra
- Video: [MEMORY COMPOSING | All possible cases explained.](https://www.youtube.com/watch?v=yANZkS2p1tU) — Shiva Gyawali
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/compose-2k1x2n
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-4

## Question

Compose a memory of size 2^(k+1) × 2n using 2^k × n sized memory.

## Short answer

Requires four 2^k×n modules in 2 rows × 2 columns. A_k decodes to enable row 0 or row 1; all share A(k-1)..A0. Each row’s two modules provide n-bit halves for a 2n-bit word.

## Answer

**Given:** base module 2^k x n; **required:** 2^(k+1) x 2n memory. Number of modules = (depth ratio) x (width ratio) = 2 x 2 = **4**.

#### Method
- **Width:** the required word is 2n bits and each module gives n bits, so 2 modules are placed side by side (same address and enable); their data outputs are combined to form the full word.
- **Depth:** twice as many words are needed, so 2 rows of modules are used. The extra high-order address line **A_k** goes to a 1-to-2 decoder whose outputs enable one row at a time. The low-order k address lines (A(k-1)..A0) go to every module in parallel. The rows share the same data lines (tri-state outputs).
- Total address lines = k + 1; total data lines = 2n.

#### Block diagram
```text
 Address bits: k+1 lines
   A_k --> [1-to-2 decoder] --> row enables E0, E1
   A(k-1)..A0 --> to every module (parallel)

 row 0: [M00] [M01]  <- E0
 row 1: [M10] [M11]  <- E1

 Data: M*0: bits 0 to n-1, M*1: bits n to 2n-1
```

#### Row selection
| A_k | Row enabled | Addresses |
|---|---|---|
| 0 | Row 0 (E0) | 0 to 2^k - 1 |
| 1 | Row 1 (E1) | 2^k to 2^(k+1) - 1 |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How many 2^k x n modules form a 2^(k+1) x 2n memory?
   A. 4
   B. 2
   C. 8
   D. 3
   Answer: A. Depth ratio 2 x width ratio 2 = 4. (Key point: Number of modules)

2. How is the 2n-bit word formed?
   A. Two modules side by side, sharing address and enable, outputs concatenated
   B. Two modules in different rows
   C. One module twice
   D. A decoder joins the bits
   Answer: A. Each module gives n bits, so two side by side give 2n bits. (Key point: Width)

3. What selects the module row?
   A. A_k through a 1-to-2 decoder
   B. A0
   C. The data bus
   D. The write signal
   Answer: A. The high-order bit A_k enables one row at a time; low-order k lines go to all modules. (Key point: Depth)

4. What are the total address and data lines?
   A. k+1 address, 2n data
   B. k address, n data
   C. k+1 address, n data
   D. 2k address, 2n data
   Answer: A. Address needs k+1 bits for twice the words and data is 2n wide. (Key point: Totals)

## Related in Embedded System

- [Compose 2^(k+1) x m from 2^k x m](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acompose-2k1m-from-2km) — Embedded System, chapter 4

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