---
title: "Full-custom, semi-custom and PLD design steps"
subject: "Embedded System"
chapter: 8
key: "semester_6/embedded_system:full-semi-custom-pld-steps"
source: https://www.bctengineer.com/q/semester_6/embedded_system/full-semi-custom-pld-steps
site: BCT Engineering
---

# Full-custom, semi-custom and PLD design steps

Embedded System · Chapter 8: IC Technology

- Asked in: 2073 Bhadra, 8 marks; 2078 Poush, 8 marks (asked 2 times)
- Video: [VLSI FOR ALL - VLSI Design Styles | Standard Cell, Gate Array, Full Custom, Semi Custom, PLDs, FPGA](https://www.youtube.com/watch?v=JzMYEWXihpo) — VLSI FOR ALL
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/full-semi-custom-pld-steps
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-8

## Question

Explain (describe the steps involved in the design of) Full-Custom, Semi-Custom and PLD schemes used in IC technology, with steps and comparison.

## Short answer

Full-custom manually designs all layers; process: hand layout, full mask set. Semi-custom: HDL synthesis to cells, auto place/route; gate array uses metal-only masks, standard cell uses all masks. PLD: synthesize, map, program device – no masks, lowest NRE, re-programmabiable.

## Answer

Three schemes are used to implement an IC design. They differ in how much of the chip is designed by the user.

#### Full-custom

1. Specification and architecture.
2. Logic/circuit design: transistor-level schematics, sizing for speed and power.
3. Physical layout drawn by hand: every transistor and wire as polygons.
4. Design rule check, extraction and simulation (repeat until correct).
5. Generate a full set of masks.
6. Fabricate wafers, test, package.

#### Semi-custom (gate array / standard cell)

1. Specification; write the design in VHDL/Verilog or schematic.
2. Simulate and synthesise to a netlist of library cells.
3. Place the cells and route the wires (automatically by tools).
4. Verify timing and design rules.
5. Make masks: only metal/contact layers (gate array) or all layers (standard cell).
6. Fabricate, test, package.

#### PLD (programmable logic device: PAL, CPLD, FPGA)

1. Specification; write the design in VHDL/Verilog or schematic.
2. Simulate and synthesise.
3. Map to the device's logic blocks, place and route using the vendor tool.
4. Generate the programming (bit) file.
5. Program the standard device (fuses, EPROM or SRAM cells), then test. No masks or fabrication by the user; it can be re-programmed.

#### Comparison

| Point | Full custom | Semi-custom | PLD |
|---|---|---|---|
| Custom masks | All | Some or all | None |
| Design time | Longest | Medium | Shortest |
| NRE cost | Highest | Medium | Lowest |
| Unit cost (high volume) | Lowest | Low | Highest |
| Speed, power, area | Best | Good | Lowest performance |
| Change after design | Not possible | Not possible | Re-programmable |
| Volume suited | Very high | Medium-high | Low and prototypes |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Full-custom layout?
   A. Hand-drawn transistors and wires
   B. Auto-synthesised
   C. Programmed
   D. Fuses
   Answer: A. Highest effort. (Key point: Full custom)

2. Semi-custom flow?
   A. Hand layout
   B. Program SRAM
   C. No masks
   D. Synthesise to library cells, auto place and route
   Answer: D. Netlist of cells. (Key point: Semi-custom)

3. PLD advantage?
   A. Lowest unit cost at volume
   B. Best performance
   C. No user masks; re-programmable
   D. Full masks
   Answer: C. Bit file. (Key point: PLD)

4. Lowest NRE?
   A. Full custom
   B. PLD
   C. Semi-custom
   D. All equal
   Answer: B. No masks. (Key point: Comparison)

## Related in Embedded System

- [Two categories of semi-custom IC](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-two-categories) — Embedded System, chapter 8, asked 2×
- [Semi-custom ASIC and manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-asic-types-manufacturing) — Embedded System, chapter 8
- [Full-custom IC advantages and disadvantages](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Afull-custom-pros-cons) — Embedded System, chapter 8, asked 2×
- [Full custom VLSI technology](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Afull-custom-vlsi-brief) — Embedded System, chapter 8
- [IC manufacturing steps; top-down F = xz + y](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps-topdown-xz-y) — Embedded System, chapter 8
- [IC manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps) — Embedded System, chapter 8

## Related in other subjects

- [FDM basic steps; explicit and implicit schemes](https://www.bctengineer.com/question.md?key=semester_8%2Fcomputational_techniques_in_civil_engineering%3Afdm-steps-explicit-implicit) — Computational Techniques in Civil Engineering, chapter 5
- [Semi-modular pipe outlet design, flexibility 0.9](https://www.bctengineer.com/question.md?key=semester_6%2Firrigation_and_drainage_engineering%3Asemimodular-pipe-outlet-flexibility-09) — Irrigation and Drainage Engineering, chapter 7
- [Semi-theoretical approach in canal design](https://www.bctengineer.com/question.md?key=semester_6%2Firrigation_and_drainage_engineering%3Asemi-theoretical-approach-canal) — Irrigation and Drainage Engineering, chapter 4
- [Adjustable orifice semi-module design](https://www.bctengineer.com/question.md?key=semester_6%2Firrigation_and_drainage_engineering%3Aadjustable-orifice-semimodule-022) — Irrigation and Drainage Engineering, chapter 7