---
title: "GPP operation: datapath and controller"
subject: "Embedded System"
chapter: 2
key: "semester_6/embedded_system:gpp-datapath-controller"
source: https://www.bctengineer.com/q/semester_6/embedded_system/gpp-datapath-controller
site: BCT Engineering
---

# GPP operation: datapath and controller

Embedded System · Chapter 2: Hardware Design Issues

- Asked in: 2070 Bhadra, 5 marks; 2075 Bhadra, 4 marks; 2072 Magh, 5 marks; 2078 Baisakh, 2 marks (asked 4 times)
- Video: [embedded system in nepali general purpose processor](https://www.youtube.com/watch?v=4w5cgufg2j0) — IOE Electronics and communication engineering
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/gpp-datapath-controller
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-2

## Question

Draw the basic architecture of a general-purpose processor and describe its operation in terms of datapath and controller.

## Short answer

A GPP has a controller (PC, IR, control logic) that fetches, decodes, and sequences instructions, and a datapath (register file, ALU, buses) that performs computations. The controller decodes opcodes to generate control signals, moving data through the ALU and storing results in a repeating fetch-decode-execute cycle.

## Answer

A **general-purpose processor (GPP)** is a programmable processor suited to many applications. It has a **controller** (control unit) that sequences operations and a **datapath** that performs them, plus memory that holds the program and data.

#### Basic architecture
```text
  +----------------- Processor -----------------+
  | Controller (control unit)                    |
  |  +----+  +----+  +-----------------+        |
  |  | PC |  | IR |  | Control logic / |        |
  |  +----+  +----+  | state register  |        |
  |                  +--------+--------+        |
  |        control signals     |  status        |
  | Datapath                   v                |
  |  +-----------+   +-------------+            |
  |  | Register  |-->|     ALU     |--> flags   |
  |  | file      |<--|             |            |
  |  +-----------+   +-------------+            |
  +-------+-------------------+-----------------+
          | address/data bus  |
     +----+--------+     +----+---------+
     | Program mem |     |  Data memory |
     +-------------+     +--------------+
```

#### Datapath
Consists of registers (accumulator, general registers, status), the **ALU** (arithmetic and logic operations) and internal buses/multiplexers. Data from registers or memory flows through the ALU and results are stored back. It performs the actual computation, in response to control signals.

#### Controller
Contains the **program counter (PC)** (address of next instruction), **instruction register (IR)** (current instruction), and **control logic/state register** that decodes the opcode and generates control signals (register selects, ALU function, read/write, etc.). Control logic may be hardwired or microprogrammed.

#### Operation (instruction cycle)
1. **Fetch:** IR <- Memory[PC]; PC <- PC + 1.
2. **Decode:** the control logic interprets the opcode and selects the registers/ALU operation.
3. **Execute (and fetch operands):** the datapath operates, e.g. R1 <- R1 + R2.
4. **Store result:** write result to a register or memory.
The cycle repeats for the next instruction.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. A general-purpose processor consists of:
   A. Only memory
   B. Only an ALU
   C. Controller and datapath, with memory holding program and data
   D. Sensors and actuators only
   Answer: C. The controller sequences operations, the datapath performs them, and memory holds program and data. (Key point: GPP structure)

2. What does the datapath contain and do?
   A. Only the clock
   B. PC and IR that decode instructions
   C. Only program memory
   D. Registers, ALU and buses that perform computation under control signals
   Answer: D. The datapath holds registers, ALU, buses and does the actual computation. (Key point: Datapath role)

3. Which belong to the controller?
   A. PC, IR and control logic/state register
   B. ALU and register file
   C. Data memory
   D. Accumulator only
   Answer: A. The PC holds the next-instruction address, IR holds the current instruction, and control logic generates control signals. (Key point: Controller components)

4. What happens in the fetch step?
   A. ALU adds registers
   B. IR <- Memory[PC]; PC <- PC + 1
   C. Result is written to memory
   D. Opcode decoded
   Answer: B. Fetch loads the instruction into IR and increments PC. (Key point: Fetch step)

## Related in Embedded System

- [ASIP versus general purpose processor](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aasip-vs-gpp) — Embedded System, chapter 2
- [Single-purpose processor for power](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aspp-power) — Embedded System, chapter 2, asked 2×
- [ASIP vs GPP and processor selection](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aasip-vs-gpp-selection-issues) — Embedded System, chapter 2
- [Fibonacci single-purpose processor](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aspp-fibonacci) — Embedded System, chapter 2, asked 2×
- [Factorial single-purpose processor](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aspp-factorial) — Embedded System, chapter 2
- [Dual-purpose processor: median and variance](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Adual-purpose-median-variance) — Embedded System, chapter 2

## Related in other subjects

- [SPC and dual processor architecture](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspc-dual-processor) — Telecommunications, chapter 4
- [Basic terms of limits, fits and tolerances](https://www.bctengineer.com/question.md?key=semester_3%2Fmetrology%3Alimits-fits-terminology) — Metrology, chapter 9
- [Basic ISDN services and architecture](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aisdn-services-architecture) — Telecommunications, chapter 8
- [SUN NFS architecture and operation](https://www.bctengineer.com/question.md?key=semester_7%2Fdistributed_system%3Asun-nfs-architecture) — Distributed System, chapter 2, asked 3×