---
title: "Interrupt and fixed ISR flow of actions"
subject: "Embedded System"
chapter: 5
key: "semester_6/embedded_system:interrupt-fixed-isr-flow"
source: https://www.bctengineer.com/q/semester_6/embedded_system/interrupt-fixed-isr-flow
site: BCT Engineering
---

# Interrupt and fixed ISR flow of actions

Embedded System · Chapter 5: Interfacing

- Asked in: 2075 Bhadra, 4 marks
- Video: [Interrupts Part-1 Explained in Hindi l Embedded and Real time Operating System Course](https://www.youtube.com/watch?v=qrcKLvOI6Ig) — 5 Minutes Engineering
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/interrupt-fixed-isr-flow
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-5

## Question

What is interrupt? Explain the summary of flow of actions of interrupt driven I/O using fixed ISR location.

## Short answer

An interrupt suspends main program execution; after completing the current instruction and saving PC and flags, the processor loads a fixed ISR address (e.g. 16). The ISR services the device by reading data, then a return-from-interrupt instruction restores PC and flags to resume. Multiple devices sharing the fixed ISR require polling within the ISR to identify the source.

## Answer

An **interrupt** is a signal from a peripheral (or an internal event) that makes the processor suspend the program it is running, execute a special routine called the **interrupt service routine (ISR)** and then return to the interrupted program. It lets the processor respond to events without wasting time polling.

#### Flow of actions with a fixed ISR location
In this scheme the ISR always starts at a fixed address known to the processor (e.g. 16), so the peripheral does not need to provide any address.
1. The processor is executing its main program (e.g. at address 100).
2. The peripheral has data and asserts the interrupt request **Int**.
3. The processor completes the current instruction, saves the return address (PC = 100) and flags, and disables further interrupts.
4. The processor loads the PC with the fixed ISR address (PC = 16). No vector is needed from the peripheral, although some systems still send an acknowledge (Inta).
5. The ISR executes: it reads data from the peripheral register (e.g. R0 = Reg) and writes it into memory (M[500] = R0); it may first save any registers it modifies.
6. The ISR finishes with a return-from-interrupt instruction. The processor restores the PC (100) and flags, and the main program resumes.

```text
 main program --Int--> save PC --> PC = fixed ISR address
        ^                              |
        +------ restore PC <-- ISR runs, then RETI
```
If several devices share the one fixed ISR, the ISR must poll them to find out which one interrupted.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is an interrupt?
   A. A loop that polls status flags
   B. A permanent halt of the processor
   C. A signal that makes the processor suspend its program, run an ISR and then return
   D. A memory error
   Answer: C. It lets the processor respond to events without wasting time polling. (Key point: Definition of interrupt)

2. In the fixed ISR location scheme, how does the processor know where the ISR starts?
   A. The peripheral places the address on the data bus
   B. It is found by polling
   C. It is always at a fixed address known to the processor, so the peripheral supplies no address
   D. It is read from the stack
   Answer: C. The PC is loaded with the fixed address (e.g. 16). (Key point: Fixed ISR address)

3. After the current instruction completes, what does the processor do before jumping to the ISR?
   A. Clears memory
   B. Resets the PC to 0
   C. Saves the return address and flags and disables further interrupts
   D. Waits for the device to finish
   Answer: C. The return address (PC) and flags are saved so the main program can resume. (Key point: Context saving)

4. If several devices share the one fixed ISR, what must the ISR do?
   A. Ignore all but one
   B. Disable the processor
   C. Poll the devices to find which interrupted
   D. Use the vector from the device
   Answer: C. With no vector, the ISR must poll to identify the source. (Key point: Shared fixed ISR)

## Related in Embedded System

- [Interrupt-driven I/O with vectored interrupt](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Avectored-interrupt-io-flow) — Embedded System, chapter 5, asked 3×
- [DMA controller and flow of actions](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Adma-controller-flow) — Embedded System, chapter 5, asked 3×
- [IRQ, ISR, IVT, PUSH, POP, latency](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Ainterrupt-terms-irq-isr-ivt) — Embedded System, chapter 5

## Related in other subjects

- [Programmed vs interrupt-driven vs DMA](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aio-techniques-compare) — Computer Organization and Architecture, chapter 7, asked 5×
- [DMA vs programmed and interrupt-driven I/O](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Adma-overcomes) — Computer Organization and Architecture, chapter 7, asked 3×
- [Interrupt driven data transfer](https://www.bctengineer.com/question.md?key=semester_5%2Finstrumentation_ii%3Ainterrupt-driven-transfer) — Instrumentation II, chapter 1, asked 2×
- [ISR, IVT and type 0 to 4 interrupts](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aivt-ir-isr-type-0-to-4) — Microprocessor, chapter 5