---
title: "Interrupt processing steps"
subject: "Embedded System"
chapter: 5
key: "semester_6/embedded_system:interrupt-processing-steps"
source: https://www.bctengineer.com/q/semester_6/embedded_system/interrupt-processing-steps
site: BCT Engineering
---

# Interrupt processing steps

Embedded System · Chapter 5: Interfacing

- Asked in: 2072 Magh, 5 marks
- Video: [C12 1b Interrupt Processing](https://www.youtube.com/watch?v=Kt_pVkFPj3c) — Jonathan Valvano
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/interrupt-processing-steps
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-5

## Question

Describe the major steps to be followed in interrupt processing by a processor.

## Short answer

When an interrupt request arrives, the processor finishes the current instruction, sends interrupt acknowledge (INTA), receives the vector if available, pushes PC and flags onto the stack, and disables further interrupts. It uses the vector to load the ISR from the vector table, executes the ISR to service the device, then pops context and executes a return-from-interrupt to resume the main program.

## Answer

When an interrupt request arrives, the processor follows these major steps:

1. **Receive and check the request:** the interrupt controller or pin raises IRQ. The processor finishes the current instruction and checks that the interrupt is enabled (not masked) and has enough priority.
2. **Acknowledge:** the processor sends an interrupt-acknowledge (INTA) signal to the device or controller.
3. **Identify the source:** the processor gets the interrupt vector number from the device (vectored) or uses a fixed address.
4. **Save the context:** the PC (return address) and the flags/status register are pushed onto the stack. Other registers are saved by the ISR if needed (PUSH).
5. **Disable further interrupts:** (optional) to protect the ISR from lower-priority interrupts.
6. **Find the ISR address:** use the vector to look up the **interrupt vector table (IVT)** and load the ISR address into the PC.
7. **Execute the ISR:** service the device (read or write the data, clear the interrupt flag).
8. **Restore the context:** registers are restored with POP, then a return-from-interrupt instruction pops the flags and PC from the stack and re-enables interrupts.
9. **Resume** the interrupted program at the saved address.

```text
 IRQ -> finish instruction -> INTA -> get vector -> PUSH PC/flags
     -> load ISR from IVT -> run ISR -> POP -> RETI -> resume
```

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does the processor do first when an IRQ arrives?
   A. Finishes the current instruction and checks that the interrupt is enabled and has enough priority
   B. Clears the stack
   C. Stops immediately mid-instruction
   D. Jumps to the ISR directly
   Answer: A. It finishes the instruction and checks masking and priority. (Key point: Checking the request)

2. What is pushed onto the stack at interrupt entry?
   A. The whole memory
   B. Only the stack pointer
   C. The IVT
   D. PC (return address) and flags/status register
   Answer: D. The return address and flags are saved; other registers are saved by the ISR if needed. (Key point: Context saving)

3. How is the ISR address found in the vectored case?
   A. The vector number indexes the interrupt vector table, giving the ISR address loaded into PC
   B. It is typed by the user
   C. It is read from the ROM start only
   D. It is calculated from the SP
   Answer: A. The IVT holds starting addresses of ISRs. (Key point: IVT lookup)

4. What does the return-from-interrupt instruction do?
   A. Pops the flags and PC from the stack, re-enables interrupts and resumes the program
   B. Resets the processor
   C. Clears the IVT
   D. Pushes registers
   Answer: A. After POPs of registers, RETI restores flags and PC so the interrupted program resumes. (Key point: Return from interrupt)

## Related in Embedded System

- [Single-purpose processor for power](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aspp-power) — Embedded System, chapter 2, asked 2×

## Related in other subjects

- [Sequence of steps when interrupt occurs](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterrupt-occurrence-steps) — Microprocessor, chapter 5, asked 2×
- [Interrupt processing in 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterrupt-processing-8086) — Microprocessor, chapter 5, asked 3×
- [Interrupt vs polling; interrupts in 8085](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Ainterrupt-vs-polling-8085) — Microprocessor, chapter 5
- [Steps of grounding mat design](https://www.bctengineer.com/question.md?key=semester_8%2Fpower_plant_design%3Agrounding-mat-design-steps) — Power Plant Design, chapter 4, asked 5×