---
title: "Memory mapped versus isolated I/O"
subject: "Embedded System"
chapter: 5
key: "semester_6/embedded_system:memory-mapped-vs-standard-io"
source: https://www.bctengineer.com/q/semester_6/embedded_system/memory-mapped-vs-standard-io
site: BCT Engineering
---

# Memory mapped versus isolated I/O

Embedded System · Chapter 5: Interfacing

- Asked in: 2072 Asoj, 3 marks; 2079 Asoj, 3 marks (asked 2 times)
- Video: [Memory Mapped IO vs IO Mapped IO in 8085 Microprocessor: Key Differences Explained](https://www.youtube.com/watch?v=iDzdyRCdqnA) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/memory-mapped-vs-standard-io
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-5

## Question

What are the differences between memory-mapped I/O and isolated (standard) I/O?

## Short answer

In memory-mapped I/O, peripheral registers share memory addresses and use ordinary load/store instructions, reducing available memory. In isolated I/O, a separate I/O space uses special IN/OUT instructions, preserving full memory but needing extra instructions and simpler decoding for a limited port range.

## Answer

In both schemes the processor talks to peripherals through registers; they differ in how those registers are addressed.

| Point | Memory-mapped I/O | Standard (isolated) I/O |
|---|---|---|
| Address space | Peripheral registers share the same address space as memory | Separate I/O address space from memory |
| Instructions | Ordinary memory instructions (MOV, LOAD, STORE) | Special instructions (IN, OUT) |
| Control signals | Same MEMR/MEMW | Separate IOR/IOW (or an M/IO' signal) |
| Memory available | Reduced, since some addresses are used for I/O | Full memory space available |
| Address decoding | Uses the full memory address width, so peripherals need wider decoders | Simpler; the small I/O space needs fewer address bits to decode |
| Instruction set | Simple; no extra instructions | Needs extra I/O instructions |
| Flexibility | Arithmetic and logic can be applied directly to I/O | Data must pass through the accumulator/register |
| Number of I/O addresses | Many | Limited (e.g. 256 ports in the 8085 with an 8-bit port address) |
| Example | ARM, 68000, MIPS | 8085, 8086 (IN/OUT) |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In memory-mapped I/O, peripheral registers:
   A. Share the memory address space
   B. Use a separate I/O address space
   C. Have no addresses
   D. Use a stack
   Answer: A. Some memory addresses are used for I/O, reducing available memory. (Key point: Address space)

2. Which instructions access isolated I/O?
   A. IN and OUT
   B. MOV and LOAD
   C. PUSH and POP
   D. JMP
   Answer: A. Isolated I/O uses special IN/OUT instructions and separate IOR/IOW signals. (Key point: Instructions)

3. Which scheme leaves full memory space available?
   A. Isolated I/O
   B. Memory-mapped I/O
   C. Both reduce it
   D. Neither
   Answer: A. Isolated I/O has a separate address space, but needs extra instructions and decoding. (Key point: Memory available)

4. Which processor uses isolated I/O (IN/OUT)?
   A. 8085
   B. ARM
   C. MIPS
   D. 68000
   Answer: A. The 8085 and 8086 use IN/OUT; ARM, MIPS and 68000 use memory-mapped I/O. (Key point: Examples)

## Related in Embedded System

- [Arbitration and memory-mapped vs standard I/O](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aarbitration-memory-mapped-io) — Embedded System, chapter 5
- [Process versus thread differences](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aprocess-vs-thread) — Embedded System, chapter 6, asked 4×

## Related in other subjects

- [Isolated I/O vs memory-mapped I/O](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aisolated-vs-mmio) — Computer Organization and Architecture, chapter 7, asked 2×
- [Short note: I/O mapped and memory mapped I/O](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aio-mapped-memory-mapped-io) — Microprocessor, chapter 4
- [Unique/non-unique decoding, memory mapped I/O](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Aunique-nonunique-decoding-memory-mapped-io) — Microprocessor, chapter 4
- [Memory-mapped I/O reduces address space](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Ammio-address-space) — Computer Organization and Architecture, chapter 7