---
title: "IC manufacturing, alignment and exposure"
subject: "Embedded System"
chapter: 8
key: "semester_6/embedded_system:photolithography-alignment-exposure"
source: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-alignment-exposure
site: BCT Engineering
---

# IC manufacturing, alignment and exposure

Embedded System · Chapter 8: IC Technology

- Asked in: 2071 Magh, 5+5 marks
- Video: [Photolithography: Step by step](https://www.youtube.com/watch?v=oBKhN4n-EGI) — Jae-Hwang Lee
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-alignment-exposure
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-8

## Question

What are IC manufacturing steps in semiconductor industries? Describe the alignment and exposure techniques in photolithographic process in IC fabrications.

## Short answer

IC fabrication steps: wafer prep, oxidation/deposition, photolithography, etching, doping, metallisation and testing. In photolithography, alignment marks are matched optically; exposure uses contact, proximity or projection (stepper/scanner) printing with short-wavelength UV/EUV to achieve fine resolution.

## Answer

#### IC manufacturing steps

1. **Wafer preparation:** silicon is purified, grown into a single-crystal ingot, sliced, polished and cleaned.
2. **Oxidation / film deposition:** SiO2 is grown, or poly-Si or metal is deposited by CVD or sputtering.
3. **Photolithography:** photoresist is coated, exposed through a mask and developed to define the pattern.
4. **Etching:** wet or dry etching removes the exposed film.
5. **Doping:** diffusion or ion implantation forms n and p regions (wells, source/drain).
6. **Metallisation and interconnect:** aluminium or copper wires and contacts connect the devices, with insulating layers between them.
7. **Planarisation and repeat:** steps 2-6 repeat for each mask layer (20-40 times).
8. **Wafer test:** each die is tested with a probe card.
9. **Dicing, packaging and final test:** the wafer is cut into dies, which are mounted in packages, wire-bonded, sealed and tested.

#### Alignment and exposure

The mask must be aligned exactly with the pattern already on the wafer; then the resist is exposed to light.

- **Alignment:** special alignment marks on the mask and on the wafer are viewed through a microscope or detected optically; the stage moves and rotates the wafer until they overlap. The overlay error must be a small fraction of the minimum feature size.
- **Contact printing:** the mask touches the resist; high resolution, but the mask gets damaged and contaminated.
- **Proximity printing:** the mask is held 10-25 µm above the wafer; no damage, but diffraction reduces resolution.
- **Projection printing:** a lens (or mirror) system projects the mask image onto the wafer.
  - *1:1 scanning projection* (early scanners): the wafer is exposed through a narrow slit while the mask and wafer scan together, with no reduction.
  - *Step-and-repeat (stepper):* exposes one die area at a time at 4x-5x reduction, so the mask features can be larger than on the wafer.
  - *Step-and-scan (scanner):* combines both; each field is exposed through a slit while the mask and wafer move in sync, at 4x reduction. It is used in advanced fabs.
- **Light source:** mercury g-line (436 nm), i-line (365 nm), KrF laser (248 nm), ArF laser (193 nm, with immersion) and EUV (13.5 nm); a shorter wavelength gives finer resolution, R = k1·λ/NA.
- The exposure time/dose must be controlled so that the resist is fully exposed and the edges are sharp.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. How is the mask aligned with the pattern already on the wafer?
   A. Alignment marks on mask and wafer are viewed optically and the stage moves and rotates the wafer until they overlap
   B. The wafer is heated until it expands to fit the mask
   C. The mask is pressed on the wafer so it self-aligns
   D. The resist is exposed first and then aligned by developing
   Answer: A. Special marks on the mask and wafer are detected and the stage moves/rotates the wafer until the marks overlap. (Key point: Alignment method)

2. What is the main drawback of proximity printing compared with contact printing?
   A. The mask gets damaged
   B. Diffraction across the 10-25 um gap reduces resolution
   C. It needs EUV light
   D. It can only expose one die at a time
   Answer: B. The gap avoids mask damage but diffraction spreads the light and lowers resolution. (Key point: Proximity printing)

3. Why can a step-and-repeat (stepper) system use a mask with larger features?
   A. It uses contact between mask and wafer
   B. It uses a longer wavelength
   C. It projects the die image at 4x-5x reduction
   D. It exposes the whole wafer in one flash
   Answer: C. The lens reduces the mask image 4x-5x onto one die area at a time, so mask features can be larger. (Key point: Stepper)

4. Which change gives finer resolution according to R = k1*lambda/NA?
   A. Longer wavelength
   B. Lower numerical aperture
   C. Going from ArF 193 nm to g-line 436 nm
   D. Shorter wavelength such as EUV 13.5 nm
   Answer: D. Smaller lambda gives smaller R, so shorter wavelength light prints finer features. (Key point: Wavelength and resolution)

## Related in Embedded System

- [IC manufacturing steps; top-down F = xz + y](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps-topdown-xz-y) — Embedded System, chapter 8
- [IC manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps) — Embedded System, chapter 8
- [Semi-custom ASIC and manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-asic-types-manufacturing) — Embedded System, chapter 8
- [Steps of photolithography process](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-steps) — Embedded System, chapter 8, asked 4×
- [Importance of photolithography in IC](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-importance) — Embedded System, chapter 8, asked 3×

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