---
title: "Photolithography importance; BJT structure"
subject: "Embedded System"
chapter: 8
key: "semester_6/embedded_system:photolithography-bjt-structure"
source: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-bjt-structure
site: BCT Engineering
---

# Photolithography importance; BJT structure

Embedded System · Chapter 8: IC Technology

- Asked in: 2079 Jestha, 3+5 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-bjt-structure
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-8

## Question

Explain the importance of photolithography in IC manufacturing. Draw final structural view diagram of respective structure. [Figure: BJT inverter: Vcc supply, load resistor RL from Vcc to the collector C, Vout taken at the collector, Vin applied through base resistor Rin to the base B, emitter E connected to 0 V]

## Short answer

Photolithography defines every region's shape and position, governing minimum feature size, density, alignment and yield. The npn BJT inverter has an n+ emitter inside a p base in an n- epitaxial collector on an n+ buried layer; p+ isolation walls and metal contacts connect base, collector and emitter.

## Answer

#### Importance of photolithography

Photolithography defines the shape and position of every region and layer of the IC, so it fixes the minimum feature size, the transistor density, the layer-to-layer alignment and the yield. It transfers the same mask pattern to all dies on a wafer at once, making mass production possible. For a BJT, separate lithography steps define the buried layer, the isolation, the base region, the emitter region, the contact windows and the metal; each is aligned to the previous one.

#### Final structure of the BJT inverter

The circuit is an npn transistor with a collector load resistor RL to Vcc and a base resistor Rin. On the chip, RL and Rin are made as diffused (for example p-type, made with the base diffusion) or polysilicon resistors, each with a metal contact at both ends.

```text
        E             B               C      (Al contacts)
        |             |               |
 ---SiO2|----SiO2-----|-----SiO2------|--SiO2--
   +----------------------------+   +---------+
   |  +------------+            |   |   n+    |
   |  | n+ emitter |   p base   |   | (coll.  |
   |  +------------+            |   | contact)|
   +----------------------------+   +---------+
            n- epitaxial layer (collector)
   ===========  n+ buried layer  ===========
            p-type substrate (0 V)
```

- The **n+ emitter** is diffused inside the **p base**, which is diffused into the **n- epitaxial collector**.
- The **n+ buried layer** reduces collector resistance.
- The **n+ collector contact** brings the collector to the surface.
- **SiO2** insulates the surface between contacts; **aluminium** connects E to 0 V, C to Vout and to RL (to Vcc), and B to Rin (to Vin).
- **Isolation:** p+ isolation walls reaching down to the grounded p-type substrate surround the device, so reverse-biased p-n junctions separate it from its neighbours.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is photolithography so important in IC fabrication?
   A. It supplies the power to the chip
   B. It defines the shape and position of every region and layer, fixing feature size, density and yield
   C. It only cleans the wafer
   D. It replaces doping
   Answer: B. It defines every region and layer and transfers the pattern to all dies at once. (Key point: Importance of photolithography)

2. What is the purpose of the n+ buried layer in the BJT?
   A. To form the emitter
   B. To isolate neighbours
   C. To reduce the collector resistance
   D. To act as a base resistor
   Answer: C. The low-resistance buried layer provides a low resistance path for collector current. (Key point: Buried layer)

3. In the npn BJT, where is the n+ emitter diffused?
   A. Directly in the substrate
   B. Inside the n-epitaxial layer only
   C. Inside the buried layer
   D. Inside the p base, which lies inside the n-epitaxial collector
   Answer: D. The emitter is diffused inside the p base, which is inside the n-epi collector. (Key point: Structure of the BJT)

4. How are the separate lithography steps for base, emitter and contacts related?
   A. Each is aligned to the previous one
   B. They are done in random order
   C. They use one combined mask
   D. They need no alignment
   Answer: A. Each mask step must be aligned to the pattern from the previous step. (Key point: Alignment between steps)

## Related in Embedded System

- [Importance of photolithography in IC](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-importance) — Embedded System, chapter 8, asked 3×
- [IC manufacturing steps; top-down F = xz + y](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps-topdown-xz-y) — Embedded System, chapter 8
- [IC manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps) — Embedded System, chapter 8
- [IC manufacturing, alignment and exposure](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-alignment-exposure) — Embedded System, chapter 8
- [Top-down view for F = xz + yz'](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Apositive-photoresist-topdown-xz-yzbar) — Embedded System, chapter 8
- [Semi-custom ASIC and manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-asic-types-manufacturing) — Embedded System, chapter 8

## Related in other subjects

- [Emitter-bias BJT Q point and load line](https://www.bctengineer.com/question.md?key=semester_1%2Ffundamental_of_electrical_and_electronics_engineering%3Aemitter-bias-q-point) — Fundamental of Electrical and Electronics Engineering, chapter 5
- [Derive Ai, Rin and Rout of emitter follower](https://www.bctengineer.com/question.md?key=semester_3%2Felectronics_devices_and_circuit%3Acc-ai-rin-rout-derivation) — Electronics Devices and Circuit, chapter 2
- [Full-bridge square-wave inverter, 400 V, RL load](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Afull-bridge-inverter-400v-rl) — Power Electronics, chapter 5
- [BJT differential amplifier collector waveforms](https://www.bctengineer.com/question.md?key=semester_2%2Fbasic_electronics_engineering%3Adiff-amp-bjt-waveform) — Basic Electronics Engineering, chapter 4
