---
title: "Importance of photolithography in IC"
subject: "Embedded System"
chapter: 8
key: "semester_6/embedded_system:photolithography-importance"
source: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-importance
site: BCT Engineering
---

# Importance of photolithography in IC

Embedded System · Chapter 8: IC Technology

- Asked in: 2071 Bhadra, 8 marks; 2073 Magh, 5 marks; 2074 Bhadra, 5 marks (asked 3 times)
- Video: [How are microchips made? - George Zaidan and Sajan Saini](https://www.youtube.com/watch?v=IkRXpFIRUl4) — TED-Ed
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/photolithography-importance
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-8

## Question

Explain the importance of photolithography in IC manufacturing (with a suitable example).

## Short answer

Photolithography defines every layer’s geometry, setting minimum transistor size and chip density. It selectively patterns resist to enable etching and doping, and its overlay accuracy affects yield. For example, it creates source/drain regions by opening oxide windows for diffusion.

## Answer

Photolithography is the key step that defines the geometry of every layer of an IC. Without it no pattern could be put on the wafer, so it decides the size, density and cost of the chip.

#### Importance

- **Pattern transfer:** it copies the layout of each mask (wells, diffusions, gates, contacts, metal) onto the wafer accurately.
- **Minimum feature size:** the resolution of the lithography (R = k1·λ/NA) sets the smallest transistor, which sets how many transistors fit on a chip (Moore's law).
- **Selective processing:** the patterned resist protects some regions while others are etched, doped (diffusion or ion implantation) or coated.
- **Layer alignment:** an IC uses 20-40 mask layers that must overlay precisely, so lithography accuracy determines yield.
- **Cost and yield:** it takes about 30-35 % of the total wafer cost and is repeated for each layer; defects here directly reduce yield.
- **Mass production:** one mask exposes thousands of identical dies at once.

#### Example: making an NMOS source and drain

1. Grow SiO2 on a p-type wafer and coat it with resist.
2. Expose through a mask that has openings at the source and drain areas and develop.
3. Etch the oxide through these windows, down to silicon.
4. Strip the resist and diffuse or implant n-type dopant (phosphorus/arsenic); the oxide blocks dopant elsewhere. This forms the n+ source and drain.
5. A later photolithography step patterns the polysilicon gate, aligned between source and drain, then another patterns contacts and metal.

Thus each device region exists only because photolithography defined it.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why is it key?
   A. Grows crystal
   B. Defines the geometry of every IC layer
   C. Packages chips
   D. Tests chips
   Answer: B. No pattern without it. (Key point: Core role)

2. What sets minimum feature size?
   A. R = k1 lambda/NA
   B. R = lambda x NA
   C. Wafer thickness
   D. Resist color
   Answer: A. Determines transistor count. (Key point: Resolution)

3. Share of wafer cost?
   A. About 1%
   B. About 90%
   C. None
   D. About 30-35%
   Answer: D. Repeated each layer. (Key point: Cost)

4. Role of oxide in source/drain?
   A. Conducts current
   B. Is the gate
   C. Blocks dopant except through windows
   D. Is metal
   Answer: C. Windows form n+ regions. (Key point: NMOS example)

## Related in Embedded System

- [IC manufacturing, alignment and exposure](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-alignment-exposure) — Embedded System, chapter 8
- [IC manufacturing steps; top-down F = xz + y](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps-topdown-xz-y) — Embedded System, chapter 8
- [IC manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aic-manufacturing-steps) — Embedded System, chapter 8
- [Photolithography importance; BJT structure](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aphotolithography-bjt-structure) — Embedded System, chapter 8
- [Semi-custom ASIC and manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-asic-types-manufacturing) — Embedded System, chapter 8