---
title: "Define addressing mode and pipelining"
subject: "Embedded System"
chapter: 2
key: "semester_6/embedded_system:pipelining-addressing-mode-define"
source: https://www.bctengineer.com/q/semester_6/embedded_system/pipelining-addressing-mode-define
site: BCT Engineering
---

# Define addressing mode and pipelining

Embedded System · Chapter 2: Hardware Design Issues

- Asked in: 2072 Magh, 3 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/pipelining-addressing-mode-define
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-2

## Question

Define addressing mode and pipelining.

## Answer

**Addressing mode:** the method by which an instruction specifies the location of its operand. It tells the processor how to compute the effective address of the data. Common modes: immediate (operand in the instruction), register, direct (address given), register indirect (register holds the address), indexed/base-plus-offset and relative. Example: MOV A, #25H (immediate); MOV A, 30H (direct); MOV A, @R0 (register indirect).

**Pipelining:** a technique that overlaps the execution of multiple instructions by dividing instruction processing into stages (fetch, decode, execute, memory, write-back), each working on a different instruction in the same clock cycle. It increases instruction throughput (ideally one instruction per cycle) without shortening the time for each individual instruction.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does an addressing mode specify?
   A. How fast the clock runs
   B. The number of pipeline stages
   C. The size of the cache
   D. How an instruction specifies the location of its operand
   Answer: D. An addressing mode tells the processor how to compute the effective address of the operand. (Key point: Addressing mode)

2. In MOV A, @R0, how is the operand found?
   A. R0 holds the address of the operand
   B. The operand is inside the instruction
   C. R0 holds the operand itself
   D. The address is given directly in the instruction
   Answer: A. Register indirect mode uses a register that contains the operand's address. (Key point: Register indirect)

3. What does pipelining improve?
   A. The time taken by each single instruction
   B. Instruction throughput, ideally one instruction per cycle
   C. The size of program memory
   D. The number of registers
   Answer: B. Overlapping stages raises throughput, but each individual instruction still takes the same time. (Key point: Pipelining effect)

## Related in other subjects

- [Addressing modes with examples](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Aaddressing-modes) — Computer Organization and Architecture, chapter 2, asked 10×
- [Addressing modes of 8086](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3A8086-addressing-modes) — Microprocessor, chapter 3, asked 2×