---
title: "ROM types and 4x3 ROM design"
subject: "Embedded System"
chapter: 4
key: "semester_6/embedded_system:rom-types-4x3-design"
source: https://www.bctengineer.com/q/semester_6/embedded_system/rom-types-4x3-design
site: BCT Engineering
---

# ROM types and 4x3 ROM design

Embedded System · Chapter 4: Memory

- Asked in: 2070 Bhadra, 6+2 marks
- Video: [ROM - Read Only Memory: Basics, Structure, Size, and Classifications in Digital Electronics](https://www.youtube.com/watch?v=Cd19ohX0770) — Engineering Funda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/rom-types-4x3-design
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-4

## Question

Describe ROM and introduce its types in detail. Sketch the internal design of a 4 × 3 ROM.

## Short answer

ROM is non-volatile memory that retains data without power. Types include mask ROM (factory-programmed, permanent), PROM (fuse-based, one-time programmable), EPROM (UV-erasable), EEPROM (electrically byte-erasable), and Flash (block-erasable). A 4×3 ROM uses a 2-to-4 decoder to select a word line; three OR gates form the output bits, with connections at crosspoints defining stored words.

## Answer

**ROM (Read-Only Memory)** is a non-volatile memory that keeps its stored data without power. In the system it is normally only read, and written rarely or never; it holds fixed programs such as firmware and boot code.

#### Types of ROM
| Type | Programming | Erasable | Notes |
|---|---|---|---|
| **Mask-programmed ROM** | At the factory using a mask | No | Cheapest for large volumes; high NRE cost, contents permanent |
| **PROM / OTP ROM** | By the user, once, with a programmer (blowing fuses) | No | Good for small volumes and prototypes |
| **EPROM** | By the user with a programmer | Yes, by UV light (whole chip, ~20 min) | Floating-gate transistor, quartz window |
| **EEPROM** | In-system, electrically | Yes, per byte, electrically | Slower writes, limited cycles; used for settings |
| **Flash** | In-system, electrically | Yes, block-wise | High density, cheap, fast reads; used for firmware, USB drives |

#### Internal design of a 4 x 3 ROM
A 4 x 3 ROM stores 4 words of 3 bits. It needs 2 address lines (A1, A0), a 2-to-4 decoder, 4 word lines and one OR gate per output bit (3 OR gates). A 1 is stored wherever a word line is connected to an OR gate input.

Example contents: w0 = 101, w1 = 011, w2 = 110, w3 = 001.

```text
                         D2 col  D1 col  D0 col
          +---------+      |       |       |
 A1 ----->|         |--w0--X-------+-------X----   w0 = 101
          | 2-to-4  |--w1--+-------X-------X----   w1 = 011
 A0 ----->| decoder |--w2--X-------X-------+----   w2 = 110
          |         |--w3--+-------+-------X----   w3 = 001
          +---------+      |       |       |
                         [OR]    [OR]    [OR]
                           |       |       |
                           D2      D1      D0

 X = connection (bit 1);  + = crossing with no connection (bit 0)
```
So D2 = w0 + w2, D1 = w1 + w2 and D0 = w0 + w1 + w3. Each connection is made by a transistor or fuse at the crosspoint. When address A1A0 is applied, the decoder activates one word line and the three OR outputs give the stored word.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Mask-programmed ROM is programmed:
   A. At the factory using a mask
   B. By the user with a UV lamp
   C. In-system electrically
   D. By blowing fuses once
   Answer: A. Mask ROM contents are set at manufacture; it is cheapest for large volumes but not erasable. (Key point: Mask ROM)

2. Which ROM type is erased block-wise electrically and used for firmware and USB drives?
   A. PROM
   B. EPROM
   C. Flash
   D. Mask ROM
   Answer: C. Flash is in-system, electrically erasable block-wise, dense and cheap. (Key point: Flash vs EEPROM)

3. What does a 4 x 3 ROM need for its internal design?
   A. 2 address lines, a 2-to-4 decoder and 3 OR gates
   B. 3 address lines, a 3-to-8 decoder and 4 OR gates
   C. 4 address lines and 3 flip-flops
   D. 2 address lines and 4 OR gates
   Answer: A. 4 words need 2 address bits and a 2-to-4 decoder; 3-bit words need 3 OR gates. (Key point: 4x3 ROM structure)

4. With w0=101, w1=011, w2=110, w3=001, which expression gives D0?
   A. w0 + w1 + w3
   B. w0 + w2
   C. w1 + w2
   D. w0 + w1 + w2
   Answer: A. D0 is 1 in w0 (101), w1 (011) and w3 (001), so D0 = w0 + w1 + w3. (Key point: OR gate connections)

## Related in Embedded System

- [Design ROM for A,B,C to F1-F4 table](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Arom-design-abc-f1-f4) — Embedded System, chapter 4, asked 2×
- [Design ROM for X,Y,Z to F1-F4 table](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Arom-design-xyz-f1-f4) — Embedded System, chapter 4, asked 2×
- [Design ROM for X,Y,Z to F1,F2 table](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Arom-design-xyz-f1-f2) — Embedded System, chapter 4

## Related in other subjects

- [Interface two 8K x 8 ROM at 4000H](https://www.bctengineer.com/question.md?key=semester_4%2Fmicroprocessor%3Adecoder-two-8k-rom-4000h) — Microprocessor, chapter 4
- [Risk planning; internal, external; risk reduction](https://www.bctengineer.com/question.md?key=semester_7%2Fproject_engineering%3Arisk-reduction-internal-external-planning) — Project Engineering, chapter 5
- [Internal (hot spot) temperature of core](https://www.bctengineer.com/question.md?key=semester_5%2Felectric_machine_design%3Ahot-spot-core-temperature) — Electric Machine Design, chapter 2, asked 6×
- [Internal temperature of a homogeneous material](https://www.bctengineer.com/question.md?key=semester_5%2Felectric_machine_design%3Ainternal-temperature-homogeneous-material) — Electric Machine Design, chapter 2
