---
title: "Two categories of semi-custom IC"
subject: "Embedded System"
chapter: 8
key: "semester_6/embedded_system:semi-custom-two-categories"
source: https://www.bctengineer.com/q/semester_6/embedded_system/semi-custom-two-categories
site: BCT Engineering
---

# Two categories of semi-custom IC

Embedded System · Chapter 8: IC Technology

- Asked in: 2073 Magh, 3 marks; 2074 Bhadra, 3 marks (asked 2 times)
- Video: [Semicustom Design](https://www.youtube.com/watch?v=OhtvysvjcaU) — Ekeeda
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/semi-custom-two-categories
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-8

## Question

Explain the two broad categories of Semi-Custom IC technology.

## Short answer

Gate array uses pre-fabricted transistors; only metal interconnects customized, offering low NRE and quick turnaround. Standard cell uses pre-designed library cells, all masks custom, providing higher density and speed but higher cost.

## Answer

In **semi-custom (ASIC)** technology the chip is built from pre-designed logic cells or pre-fabricated transistors, and only the connections (and some layers) are designed for the customer. The two categories are:

#### 1. Gate array (array-based)

- The manufacturer makes wafers with an array of unconnected transistors/gates (the base array) in advance.
- The customer design only needs the **metal interconnect layers** (and contacts), so only a few masks are made.
- Short turnaround and low NRE, but lower density and speed because the cells are fixed and routing must go around them.

#### 2. Standard cell (cell-based)

- The designer uses a **library of pre-designed, pre-tested cells** (gates, flip-flops, multiplexers) of equal height, placed in rows with routing channels between them.
- **All mask layers** are custom, so the layout is more efficient than a gate array's: smaller area, higher speed and lower power.
- Higher NRE and longer design time than gate arrays, but cheaper than full custom.

| Point | Gate array | Standard cell |
|---|---|---|
| Custom masks | Metal layers only | All layers |
| Density | Moderate | High |
| Cost, time | Lower | Higher |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Two categories?
   A. PAL and CPLD
   B. Positive and negative
   C. Contact and proximity
   D. Gate array and standard cell
   Answer: D. Array vs cell. (Key point: Categories)

2. Custom layers in gate array?
   A. All
   B. None
   C. Metal interconnect only
   D. Doping only
   Answer: C. Base array premade. (Key point: Gate array)

3. Standard cell compared?
   A. Metal only
   B. All layers custom; smaller, faster, higher NRE
   C. Fewer masks
   D. Lower NRE than gate array
   Answer: B. Library cells. (Key point: Standard cell)

## Related in Embedded System

- [Semi-custom ASIC and manufacturing steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Asemi-custom-asic-types-manufacturing) — Embedded System, chapter 8
- [Full-custom, semi-custom and PLD design steps](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Afull-semi-custom-pld-steps) — Embedded System, chapter 8, asked 2×
- [Full-custom IC advantages and disadvantages](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Afull-custom-pros-cons) — Embedded System, chapter 8, asked 2×
- [Full custom VLSI technology](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Afull-custom-vlsi-brief) — Embedded System, chapter 8

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