---
title: "SRAM versus DRAM"
subject: "Embedded System"
chapter: 4
key: "semester_6/embedded_system:sram-vs-dram"
source: https://www.bctengineer.com/q/semester_6/embedded_system/sram-vs-dram
site: BCT Engineering
---

# SRAM versus DRAM

Embedded System · Chapter 4: Memory

- Asked in: 2072 Magh, 3 marks
- Video: [SRAM vs DRAM : How SRAM Works? How DRAM Works? Why SRAM is faster than DRAM?](https://www.youtube.com/watch?v=r787m_IaR1I) — ALL ABOUT ELECTRONICS
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/sram-vs-dram
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-4

## Question

Show the differences between SRAM and DRAM.

## Short answer

SRAM uses six-transistor flip-flops, no refresh, faster (1–10 ns) but lower density and higher cost per bit. DRAM uses one transistor and capacitor, needs periodic refresh, slower (50–70 ns) but higher density and lower cost.

## Answer

| Point | SRAM | DRAM |
|---|---|---|
| Storage element | Flip-flop (6 transistors) | One transistor and one capacitor |
| Refresh | Not required | Required every few milliseconds |
| Speed | Faster (about 1-10 ns) | Slower (about 50-70 ns) |
| Density | Low | High |
| Cost per bit | High | Low |
| Power | Low standby power (no refresh), but higher power per bit when active | Needs refresh power all the time, but lower power per bit |
| Complexity | Simple interface | Needs refresh and multiplexed address circuits |
| Access | Direct | Row/column addressing |
| Typical use | Cache, registers | Main memory |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What stores a bit in DRAM?
   A. A flip-flop of 6 transistors
   B. One transistor and one capacitor
   C. A fuse
   D. A floating gate
   Answer: B. DRAM uses one transistor and one capacitor; SRAM uses a flip-flop. (Key point: Storage element)

2. Which memory needs periodic refresh?
   A. SRAM
   B. DRAM
   C. Both
   D. Neither
   Answer: B. DRAM capacitors leak, so refresh is required every few milliseconds; SRAM needs none. (Key point: Refresh)

3. Which pairing of memory and typical use is correct?
   A. DRAM for cache, SRAM for main memory
   B. SRAM for cache, DRAM for main memory
   C. Both for cache only
   D. SRAM for main memory because it is cheaper
   Answer: B. SRAM is fast but costly and low density (cache); DRAM is dense and cheap (main memory). (Key point: Typical use)

## Related in Embedded System

- [Process versus thread differences](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Aprocess-vs-thread) — Embedded System, chapter 6, asked 4×
- [Memory mapped versus isolated I/O](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Amemory-mapped-vs-standard-io) — Embedded System, chapter 5, asked 2×
- [Datapath versus control unit](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Adatapath-vs-control-unit) — Embedded System, chapter 2
- [Strobe versus handshake protocol](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Astrobe-vs-handshake) — Embedded System, chapter 5

## Related in other subjects

- [Web 1.0 versus Web 2.0 differences](https://www.bctengineer.com/question.md?key=semester_7%2Fweb_technology%3Aweb2-vs-web1-differences) — Web Technology, chapter 6, asked 2×
- [Power versus distribution transformer](https://www.bctengineer.com/question.md?key=semester_5%2Felectric_machine_design%3Apower-vs-distribution-transformer) — Electric Machine Design, chapter 3, asked 3×
- [Rankine versus Coulomb theory](https://www.bctengineer.com/question.md?key=semester_5%2Ffoundation_engineering%3Arankine-vs-coulomb) — Foundation Engineering, chapter 3, asked 3×
- [Ferroelectricity versus piezoelectricity](https://www.bctengineer.com/question.md?key=semester_3%2Felectrical_engineering_material%3Aferroelectric-vs-piezoelectric) — Electrical Engineering Material, chapter 3, asked 2×