---
title: "Behavioral modeling; 2-input multiplexer"
subject: "Embedded System"
chapter: 9
key: "semester_6/embedded_system:vhdl-behavioral-mux"
source: https://www.bctengineer.com/q/semester_6/embedded_system/vhdl-behavioral-mux
site: BCT Engineering
---

# Behavioral modeling; 2-input multiplexer

Embedded System · Chapter 9: Microcontrollers in Embedded Systems

- Asked in: 2072 Magh, 2+6 marks
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/vhdl-behavioral-mux
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-9

## Question

What is behavioral modeling? Write VHDL code for 2-input multiplexer.

## Short answer

Behavioral modeling describes function with a process and sequential statements, not gates. A 2-to-1 multiplexer: process(d0,d1,sel) checks sel; if sel='0' then y<=d0 else y<=d1.

## Answer

#### Behavioral modeling

**Behavioral modeling** describes the circuit by its function or algorithm, using a `process` with sequential statements (if, case, loop), without stating gates or connections. The designer writes what output should result for given inputs and the synthesis tool decides the structure. It is closest to high-level programming, quick to write and good for sequential circuits and FSMs.

#### 2-input (2:1) multiplexer

A 2-to-1 multiplexer selects one of two data inputs d0, d1 using the select line `sel`: y = d0 when sel = 0 and y = d1 when sel = 1.

| sel | y |
|---|---|
| 0 | d0 |
| 1 | d1 |

```vhdl
library ieee;
use ieee.std_logic_1164.all;

entity mux2 is
  port (
    d0, d1 : in  std_logic;     -- data inputs
    sel    : in  std_logic;     -- select line
    y      : out std_logic      -- output
  );
end entity mux2;

architecture behavioral of mux2 is
begin
  process (d0, d1, sel)
  begin
    if sel = '0' then
      y <= d0;
    else
      y <= d1;
    end if;
  end process;
end architecture behavioral;
```

The process is sensitive to d0, d1 and sel, so y updates whenever any input changes. The code was analysed and simulated with GHDL.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does behavioral modeling describe?
   A. The exact gates and wiring of the circuit
   B. The function or algorithm of the circuit, leaving structure to the synthesis tool
   C. Only the physical layout on the chip
   D. Only the timing of each gate
   Answer: B. Behavioral modeling states what output results for given inputs using sequential statements in a process; the tool decides the structure. (Key point: Behavioral modeling)

2. In the 2-to-1 multiplexer, what is y when sel = 1?
   A. d0
   B. d1
   C. d0 and d1
   D. '0'
   Answer: B. y = d0 when sel = 0 and y = d1 when sel = 1. (Key point: 2:1 mux function)

3. Why does the mux process list d0, d1 and sel in its sensitivity list?
   A. So y is updated whenever any input changes
   B. So y changes only on the clock
   C. So the process runs only once
   D. Because ports must always be listed
   Answer: A. The mux is combinational, so the process must be re-evaluated whenever any of its inputs changes. (Key point: Sensitivity list of mux)

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