---
title: "Write ability and storage permanence"
subject: "Embedded System"
chapter: 4
key: "semester_6/embedded_system:write-ability-storage-permanence"
source: https://www.bctengineer.com/q/semester_6/embedded_system/write-ability-storage-permanence
site: BCT Engineering
---

# Write ability and storage permanence

Embedded System · Chapter 4: Memory

- Asked in: 2072 Asoj, 3 marks; 2074 Bhadra, 3 marks; 2075 Bhadra, 3 marks; 2078 Poush, 3 marks; 2079 Asoj, 3 marks (asked 5 times)
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/embedded_system/write-ability-storage-permanence
- Whole chapter: https://www.bctengineer.com/md/semester_6/embedded_system/chapter-4

## Question

Define write ability and storage permanence of memory (with its different levels, for different memories).

## Short answer

Write ability ranges from fast in-system writes (SRAM/DRAM) to slow/block-erase (Flash, EEPROM), programmer-only (EPROM), and fabrication-time only (mask ROM). Storage permanence spans permanent (mask ROM), non-volatile for years (Flash/EEPROM), battery-backed SRAM, static volatile (SRAM), and refresh-dependent volatile (DRAM).

## Answer

#### Write ability
**Write ability** is the manner and speed with which data can be written into a memory. Its range (best to worst):
- **Highest:** the processor can write during normal execution, in the same way and at the same speed as it reads. *RAM (SRAM, DRAM).*
- **Middle:** the processor can write, but slowly or with a limited number of cycles/block erase: *Flash* (block erase, then write) and *EEPROM* (electrically erasable byte by byte, slower than reads).
- **Lower:** writing needs a special programmer device outside the system: *EPROM* (UV erasable), *OTP ROM / PROM*.
- **Lowest:** written only during fabrication, using a mask, by the manufacturer: *mask-programmed ROM*.

#### Storage permanence
**Storage permanence** is the ability of a memory to hold its stored bits after they are written: for how long, and under what conditions. Its range:
- **Essentially permanent:** the bits stay for the life of the chip, even with power off: *mask ROM*, OTP ROM (blown fuses cannot be restored).
- **Non-volatile, but changeable:** data is retained for years after power off (about 10 years): *EPROM, EEPROM, Flash*.
- **Battery-backed:** SRAM kept alive by a battery (NVRAM).
- **Volatile, static:** *SRAM* keeps data as long as power is on.
- **Volatile, needs refresh:** *DRAM* loses data within milliseconds unless it is refreshed periodically, even with power on.

| Memory | Write ability | Storage permanence |
|---|---|---|
| Mask ROM | Fabrication only | Permanent |
| OTP ROM | Programmer, once | Permanent |
| EPROM | Programmer, UV erase | Years |
| EEPROM / Flash | In-system, slower | Years |
| SRAM | In-system, fast | While powered |
| DRAM | In-system, fast | Needs refresh |

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What is write ability?
   A. How long data stays
   B. Memory size
   C. The manner and speed with which data can be written into memory
   D. Refresh rate
   Answer: C. Storage permanence is the retention property. (Key point: Write ability)

2. Which memory has the highest write ability?
   A. Mask ROM
   B. EPROM
   C. OTP ROM
   D. RAM
   Answer: D. RAM is written in normal execution at the same speed as reading. (Key point: Highest write ability)

3. Why does DRAM have low storage permanence?
   A. It loses data in milliseconds unless refreshed, even with power on
   B. It loses data only when power is off
   C. It is written at fabrication
   D. It is permanent
   Answer: A. DRAM needs periodic refresh; SRAM only needs power. (Key point: DRAM permanence)

## Related in Embedded System

- [Compose 2^(k+1) x m from 2^k x m](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acompose-2k1m-from-2km) — Embedded System, chapter 4
- [Construct 2^(k+1) x n and 2^k x 4n](https://www.bctengineer.com/question.md?key=semester_6%2Fembedded_system%3Acompose-2k1n-and-2k4n) — Embedded System, chapter 4

## Related in other subjects

- [File system vs virtual memory; contiguous allocation](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Afs-vs-virtual-memory-contiguous-tape) — Operating System, chapter 5
- [Banded matrix and skyline storage](https://www.bctengineer.com/question.md?key=semester_8%2Fcomputational_techniques_in_civil_engineering%3Abanded-skyline-storage) — Computational Techniques in Civil Engineering, chapter 2
