---
title: "Compaction vs coalescing; paging; TLB"
subject: "Operating System"
chapter: 4
key: "semester_6/operating_system:compaction-coalescing-paging-tlb"
source: https://www.bctengineer.com/q/semester_6/operating_system/compaction-coalescing-paging-tlb
site: BCT Engineering
---

# Compaction vs coalescing; paging; TLB

Operating System · Chapter 4: Memory Management

- Asked in: 2071 Bhadra, 4+4+2 marks; year not given
- Video: [Compaction vs Coalescing with example in Operating Systems](https://www.youtube.com/watch?v=bMgDPc3tdL8) — IT Hub by MDSR
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_6/operating_system/compaction-coalescing-paging-tlb
- Whole chapter: https://www.bctengineer.com/md/semester_6/operating_system/chapter-4

## Question

Differentiate compaction and coalescing techniques. How is logical address mapped to real physical address by paging technique? Explain with suitable example. What is the role of TLB?

## Short answer

Compaction relocates processes to create one large free block; coalescing merges adjacent free blocks without moving processes. Paging maps logical address by splitting into page number and offset; page table gives frame number, then physical address = frame×size + offset. For 4KB pages, address 9000 → page 2, offset 808 → physical 4904. TLB caches recent translations to speed access.

## Answer

#### Compaction vs coalescing
| Point | Coalescing | Compaction |
|---|---|---|
| Meaning | Merging **adjacent** free blocks into one larger free block | Moving all allocated blocks together so all free space forms one block |
| When | When a block is freed next to another free block | When free space is scattered and no hole is large enough |
| Moves processes? | No | Yes, processes are relocated |
| Cost | Cheap | Expensive (copying memory, updating base registers) |
| Needs dynamic relocation? | No | Yes |
| Effect | Reduces fragmentation partly | Removes external fragmentation fully |

Example: holes of 20 K and 30 K that are adjacent become one 50 K hole by coalescing. Holes of 10 K, 20 K, 15 K separated by processes become one 45 K hole by compaction.

#### Paging and address mapping
Physical memory is divided into fixed frames and logical memory into pages of the same size. A logical address has a **page number p** and **offset d**. The **page table** maps p to a frame number f; physical address = f × page size + d.

```text
 CPU: [ p | d ] --> page table[p] = f --> [ f | d ] --> memory
```
Example: page size 1 KB (1024), logical address 2500, page table: 0→5, 1→2, 2→7.
- p = 2500 / 1024 = 2, d = 2500 mod 1024 = 452.
- Page 2 is in frame 7.
- Physical address = 7 × 1024 + 452 = 7620.

#### Role of TLB
The **TLB (Translation Lookaside Buffer)** is a small, fast associative cache inside the MMU holding recent (page, frame) pairs. Without it, each memory access needs two accesses (page table, then data). The MMU first searches the TLB for p: on a **hit** the frame is obtained at once; on a **miss** the page table in memory is read and the entry is loaded into the TLB. With hit ratio 90%, TLB time 20 ns and memory 100 ns, effective access time = 0.9×120 + 0.1×220 = 130 ns instead of 200 ns.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does coalescing do?
   A. Merges adjacent free blocks without moving processes
   B. Moves all processes together
   C. Swaps pages to disk
   D. Splits large blocks
   Answer: A. It is cheap and needs no relocation. (Key point: Coalescing)

2. What does compaction require?
   A. Fixed partitions
   B. Dynamic (run-time) relocation
   C. Segmentation hardware
   D. Nothing
   Answer: B. Processes are moved, so base addresses must be updatable. (Key point: Compaction)

3. Page size 1 KB, logical address 2500, page 2 is in frame 7. Physical address?
   A. 7000
   B. 2500
   C. 7168
   D. 7620
   Answer: D. p = 2, d = 452; 7*1024 + 452 = 7620. (Key point: Paging translation)

4. What does the TLB do?
   A. Stores the data itself
   B. Caches recent page-frame pairs to avoid an extra memory access
   C. Replaces the page table
   D. Holds disk blocks
   Answer: B. A hit gives the frame immediately; a miss reads the page table. (Key point: TLB role)

## Related in Operating System

- [Compaction vs coalescing; paging mapping](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Acompaction-coalescing-paging) — Operating System, chapter 4
- [TLB, thrashing; coalescing vs compaction](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Atlb-thrashing-coalescing-compaction) — Operating System, chapter 4
- [Logical and physical address bits](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Aresidence-monitor-address-bits) — Operating System, chapter 4
- [Page fault, demand paging, address translation](https://www.bctengineer.com/question.md?key=semester_6%2Foperating_system%3Apage-fault-demand-paging-address) — Operating System, chapter 4

## Related in other subjects

- [Physical vs logical clock; sync method](https://www.bctengineer.com/question.md?key=semester_7%2Fdistributed_system%3Aphysical-clock-sync-difficulty) — Distributed System, chapter 5, asked 2×
- [Physical vs logical clocks; Lamport](https://www.bctengineer.com/question.md?key=semester_7%2Fdistributed_system%3Alamport-physical-compare) — Distributed System, chapter 5