---
title: "di/dt, dv/dt protection and gate circuit design"
subject: "Power Electronics"
chapter: 1
key: "semester_7/power_electronics:protection-gate-design-factors"
source: https://www.bctengineer.com/q/semester_7/power_electronics/protection-gate-design-factors
site: BCT Engineering
---

# di/dt, dv/dt protection and gate circuit design

Power Electronics · Chapter 1: Characteristics and specification of power electronic devices

- Asked in: 2072 Kartik, 8 marks
- Video: [di/dt & dv/dt PROTECTION OF A THYRISTOR](https://www.youtube.com/watch?v=weAPDep1aA4) — KK CONCEPTS OF ELECTRICAL ENGINEERING
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_7/power_electronics/protection-gate-design-factors
- Whole chapter: https://www.bctengineer.com/md/semester_7/power_electronics/chapter-1

## Question

Explain the di/dt and dv/dt protection scheme of a thyristor. What factors should be considered while designing gate control circuit.

## Short answer

Series inductor Ls limits di/dt, chosen as Ls ≥ Vm/(di/dt)rated, and a strong gate pulse increases area. An RC snubber across the SCR limits dv/dt with Rs damping oscillation and limiting discharge. Gate design needs sufficient gate current/voltage, pulse width reaching latching current, fast rise, synchronisation, isolation, and false-trigger protection.

## Answer

A thyristor must be protected against a high rate of rise of anode current ($di/dt$) at turn-on, and a high rate of rise of forward voltage ($dv/dt$) when it is OFF; the gate control circuit must also be designed to fire it reliably.

```text
         Ls (di/dt)
   o----/\/\/\/----+-----------+
                   |           |
                 A |           Rs
                  SCR          |
                 K |           Cs
                   |           |
   o---------------+-----------+
       (RC snubber across SCR)
```

#### di/dt protection

**di/dt protection (series inductor):** when an SCR is turned ON, conduction starts in a small area near the gate and then spreads over the whole cathode area at about 0.1 mm/µs. If the anode current rises faster than this spreading, the current density in the small conducting area becomes very high, causing local hot spots and damage.

1. A small inductor $L_s$ is connected in series with the SCR. At turn-on the current can rise only at the rate
$$
\frac{di}{dt} = \frac{V_s}{L_s}
$$
so $L_s$ is chosen as $L_s \ge \frac{V_m}{(di/dt)_{rated}}$.
2. A strong gate pulse (high gate current with a fast rise) is also used, so that a larger area of the cathode turns ON at the start.
3. The snubber resistance $R_s$ limits the capacitor discharge current at turn-on, which is the other source of high $di/dt$.

#### dv/dt protection

**dv/dt protection (RC snubber):** when an SCR is in forward blocking, junction $J_2$ is reverse biased and behaves like a capacitor $C_j$. A fast-rising anode voltage drives a charging current $i = C_j\,\frac{dv}{dt}$ through the device. If this current is large enough it acts like a gate current and turns the SCR ON falsely. To prevent this, a series $R_s C_s$ snubber is connected across the SCR.

1. When a voltage step appears, the capacitor $C_s$ initially acts as a short circuit, so the voltage across the SCR cannot jump suddenly; it rises at the rate at which $C_s$ charges through the load and $R_s$.
2. With a series circuit inductance $L$, the rate is roughly $\frac{dv}{dt} \approx \frac{R_s V_s}{L}$, so $R_s$, $C_s$ (and $L$) are chosen to keep $dv/dt$ below the rated value.
3. $R_s$ limits the discharge current of $C_s$ through the SCR when it turns ON (the discharge current is about $V_s/R_s$), which protects against high $di/dt$ from the snubber itself. It also damps the $L$-$C_s$ oscillation. A diode across $R_s$ (polarised snubber) gives better dv/dt limiting while still limiting discharge current.

#### Factors in designing the gate control circuit

1. **Gate current and voltage:** must exceed $I_{gt}$ and $V_{gt}$ for all devices and temperatures, but stay within the gate characteristic limits ($V_{g,max}$, $I_{g,max}$, average and peak gate power).
2. **Pulse width:** long enough for the anode current to reach the latching current, especially with inductive loads; pulse trains are used for long conduction.
3. **Rise time of gate current:** a fast-rising, strong pulse turns on a larger area and improves di/dt capability.
4. **Synchronisation and range:** pulses must be locked to the supply and the firing angle adjustable over the required range.
5. **Isolation:** pulse transformer or opto-coupler between the control and power circuits.
6. **No false triggering:** a resistor (and capacitor) between gate and cathode, shielded leads, and no gate signal during reverse bias (a diode in series with the gate) to avoid extra leakage loss.
7. **Gate power during reverse bias:** gate pulse should be removed when the SCR is reverse biased.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. Why can a high di/dt at turn-on damage an SCR?
   A. The gate voltage exceeds its limit
   B. Conduction starts in a small area near the gate, and if current rises faster than it spreads, local current density causes hot spots
   C. J2 breaks down by avalanche
   D. The reverse voltage is too high
   Answer: B. Conduction spreads at only about 0.1 mm/us, so fast current rise concentrates current in a small area. (Key point: Cause of di/dt damage)

2. How does a series inductor Ls protect against di/dt?
   A. It limits the rate of current rise to Vs/Ls
   B. It raises dv/dt
   C. It increases the gate current
   D. It reverses the anode voltage
   Answer: A. At turn-on di/dt = Vs/Ls, so Ls is chosen at least Vm/(di/dt)rated. (Key point: Series inductor di/dt)

3. How can a fast rising forward voltage turn an OFF SCR ON falsely?
   A. It drives a capacitive current i = Cj*dv/dt through the reverse biased J2 that acts like a gate current
   B. It raises the temperature to melt the gate
   C. It reverses J1
   D. It reduces the holding current
   Answer: A. J2 behaves like a capacitor; its charging current acts as gate current and may trigger the SCR. (Key point: Cause of dv/dt false firing)

4. What is the role of Rs in the RC snubber?
   A. Limits the discharge current of Cs (about Vs/Rs) at turn-on and damps L-Cs oscillation
   B. Increases the dv/dt across the SCR
   C. Provides the gate pulse
   D. Bypasses the SCR when ON
   Answer: A. Rs limits the snubber capacitor discharge through the SCR at turn-on, protecting against high di/dt, and damps oscillation. (Key point: Role of Rs in snubber)

## Related in Power Electronics

- [Thyristor di/dt and dv/dt protection](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Athyristor-didt-dvdt-protection) — Power Electronics, chapter 1, asked 4×
- [Why high di/dt and dv/dt harm a thyristor](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Ahigh-didt-dvdt-protection) — Power Electronics, chapter 1
- [Snubber circuit and dv/dt protection](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Asnubber-dvdt-protection) — Power Electronics, chapter 1, asked 2×
- [SCR di/dt, dv/dt and current ratings numerical](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Ascr-snubber-didt-dvdt-numerical) — Power Electronics, chapter 1
- [Thyristor gate triggering circuit](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Athyristor-gate-triggering-circuit) — Power Electronics, chapter 1
- [Thyristor V-I, latching/holding, gate signal circuit](https://www.bctengineer.com/question.md?key=semester_7%2Fpower_electronics%3Athyristor-vi-latching-gate-circuit) — Power Electronics, chapter 1