---
title: "FET amplifier design flow and conditional stability"
subject: "RF and Microwave Engineering"
chapter: 6
key: "semester_7/rf_and_microwave_engineering:fet-amplifier-flow-conditional-stability"
source: https://www.bctengineer.com/q/semester_7/rf_and_microwave_engineering/fet-amplifier-flow-conditional-stability
site: BCT Engineering
---

# FET amplifier design flow and conditional stability

RF and Microwave Engineering · Chapter 6: RF Design Practices

- Asked in: 2073 Bhadra, 10 marks
- Video: [Microwave Amplifier Stability Introduction](https://www.youtube.com/watch?v=GegxPDDBkHI) — Jordan Edmunds Chetty
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_7/rf_and_microwave_engineering/fet-amplifier-flow-conditional-stability
- Whole chapter: https://www.bctengineer.com/md/semester_7/rf_and_microwave_engineering/chapter-6

## Question

Show a flow diagram that explains designing of an amplifier using a FET transistor. With self-defined parameters and the help of a smith chart define conditional stability of a microwave amplifier.

## Short answer

Design flow: specify, bias FET, get S-parameters, compute Δ and K; if K<1 draw stability circles and select Γs, ΓL in stable region, then design matching. Conditional stability means K<1, so only some loads are safe. Example: K=0.607, source circle CS=1.132∠68.46°, RS=0.199; stable region outside circles.

## Answer

#### Flow diagram for FET amplifier design

```text
 +------------------------------+
 | Specs: f, gain, Z0, BW, NF   |
 +------------------------------+
               |
 +------------------------------+
 | Choose transistor, bias;     |
 | get [S] at design frequency  |
 +------------------------------+
               |
 +------------------------------+
 | Compute Δ, K (and μ)         |
 +------------------------------+
               |
      K>1 and |Δ|<1 ?
     yes |          | no
         v          v
 Uncond. stable   Draw stability circles;
         |        pick Γs, ΓL in stable
         |        region (or stabilise)
         +----+-----+
              |
   Unilateral? (U small, S12≈0)
   yes: Γs=S11*, ΓL=S22*
   no : Γs=ΓMS, ΓL=ΓML (bilateral)
              |
 +------------------------------+
 | Compute GS, G0, GL -> GT     |
 +------------------------------+
              |
 +------------------------------+
 | Design input/output matching |
 | (stubs or L-C) on Smith chart|
 +------------------------------+
              |
 | Bias network, layout, simulate
              |
   Specs met? -- no --> revise
              | yes
            Build & test
```

Notes: the FET is biased (e.g. VDS, IDS from the datasheet) before reading [S]; matching networks transform 50 Ω to the required Γs and ΓL; RF chokes and DC blocks isolate bias from RF.

#### Conditional stability

An amplifier is **conditionally (potentially) stable** if |Γin| > 1 or |Γout| > 1 for some passive source or load. It happens when K < 1 (or |Δ| > 1). Then only certain Γs and ΓL are allowed, and these are found with stability circles.

#### Self-defined example

Assume a GaAs FET with S11 = 0.894∠−60.6°, S12 = 0.020∠62.4°, S21 = 3.122∠123.6°, S22 = 0.781∠−27.6°.

```text
Δ = 0.6964∠−83.07°,   K = 0.607 < 1
→ conditionally stable
Output (load) circle:  CL = 1.363∠46.69°,  RL = 0.500
Input (source) circle: CS = 1.132∠68.46°,  RS = 0.199
```

#### Using the Smith chart

1. Plot CL with radius RL on the ΓL plane and CS with radius RS on the Γs plane.
2. Test the centre: for ΓL = 0, |Γin| = |S11| = 0.894 < 1, and for Γs = 0, |Γout| = |S22| = 0.781 < 1, so the centre is stable in both planes. The centre is outside both circles, so the **stable region is outside the circles**.
3. The parts of the circles that fall inside the unit chart (near the top-right, inductive high-|Γ| region) are the **unstable regions**; Γs and ΓL must not be placed there.

```text
             .-----------.
           /          (###)    ### = unstable
          |   o        (##)      region (inside
          | centre             circle and chart)
          | stable           |
           \               /
             '-----------'
```

4. Select Γs, ΓL in the stable region with some margin and check |Γin| < 1 and |Γout| < 1. For Γs = S11*, ΓL = S22*: |Γin| = 0.912, |Γout| = 0.848, so this choice is stable and gives GTU,max = 20.95 dB (unilateral estimate; the actual GT is 20.06 dB).
5. If the desired point is unstable, add resistive loading (series/shunt resistor at input or output) or feedback to make the FET stable.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In the FET amplifier flow diagram, what happens if K > 1 and |Δ| < 1 is NOT satisfied?
   A. The design is abandoned
   B. Draw stability circles and pick Γs, ΓL in the stable region (or stabilise)
   C. Proceed with Γs = ΓL = 0 only
   D. Skip matching networks
   Answer: B. If the test fails, stability circles are drawn and terminations are chosen in the stable region, or the device is stabilised. (Key point: Flow after stability check)

2. What defines a conditionally (potentially) stable amplifier?
   A. |Γin| > 1 or |Γout| > 1 for some passive source or load; usually K < 1
   B. Stable for every passive termination
   C. Unstable for every termination
   D. S12 = 0
   Answer: A. Conditional stability means oscillation can occur for some passive Γs or ΓL, so only certain terminations are allowed. (Key point: Definition of conditional stability)

3. In the example (K = 0.607, |S11| = 0.894 < 1), which region is stable?
   A. Inside both circles
   B. Only the unit circle edge
   C. The lower half of the chart only
   D. Outside the circles, since the chart centre is stable and lies outside them
   Answer: D. The centre gives |Γin| = |S11| < 1 so it is stable, and it is outside the circles, so the stable region is outside. (Key point: Using the Smith chart)

4. If the desired Γs or ΓL falls in the unstable region, what is the remedy?
   A. Increase S12
   B. Add resistive loading or feedback to stabilise the FET
   C. Raise the supply voltage
   D. Use a longer line
   Answer: B. Series/shunt resistors at the input or output, or feedback, make the FET stable. (Key point: Fixing instability)

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