--- title: "Space switch and two-stage S-T drawbacks" subject: "Telecommunications" chapter: 4 key: "semester_8/telecommunications:space-switch-two-stage-st" source: https://www.bctengineer.com/q/semester_8/telecommunications/space-switch-two-stage-st site: BCT Engineering --- # Space switch and two-stage S-T drawbacks Telecommunications · Chapter 4: Digital Switching - Asked in: 2065 Magh (old course), 2+6+6+6 marks - Video: [Lecture - 10 Basic Time Division Switching Networks, Space-Time-Space (S-T-S) &Time-Space-Time (TST)](https://www.youtube.com/watch?v=peoFGpGCR34) — Engineering Jnana - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_8/telecommunications/space-switch-two-stage-st - Whole chapter: https://www.bctengineer.com/md/semester_8/telecommunications/chapter-4 ## Question What is space switch? How does it work? Describe the working principle and drawbacks of two stage Space-Time switch. And also explain to solve the drawbacks problem. ## Short answer A time-multiplexed space switch connects input highways to output highways in each time slot using control memories; it changes highway, not slot. Two-stage ST uses the caller's slot in the space stage then a TSI to change slot, but has a single path and blocking about p. Adding an input T stage makes TST with alternative internal slots. ## Answer #### What is a space switch? A **space switch** connects physically separate input lines (or highways) to output lines. In analogue exchanges it is a metallic crossbar matrix with one crosspoint per call. In digital exchanges it is a **time-multiplexed space switch (TMS)**: a matrix of electronic gates whose connections change every time slot, so each crosspoint is shared by many calls. It changes the **highway** of a PCM sample, not its **time slot**. #### How does it work? ```text O1 O2 ... OM I1 ------- x ---- x --------- x I2 ------- x ---- x --------- x ... IN ------- x ---- x --------- x | | | [CM1] [CM2] ... [CMM] c words x log2(N) bits ^ slot counter (0..c-1), clock ^ processor writes CMs ``` 1. There are $N$ input and $M$ output PCM highways, each with $c$ slots per 125 µs frame. 2. Each output column has a **control memory** with $c$ words; word $t$ contains the number of the input to connect in slot $t$. 3. A time-slot counter steps through the slots. In each slot, every CM is read and a decoder enables one gate in its column (logically each column is an $N$:1 multiplexer). 4. The sample in slot $t$ of the chosen input passes to the same slot $t$ of the output. 5. In the next slot other gates close, so one crosspoint can carry up to $c$ different calls per frame. 6. The processor writes the CM word at call set-up and clears it at release. **Example:** CM$_3$(word 4) = 2 → in slot 4, I2 is connected to O3. CM$_3$(word 5) = 6 → in slot 5, I6 is connected to O3. **Features:** very fast, large capacity per crosspoint, but it **cannot change the time slot**, and the crosspoint count grows as $N \times M$. #### Two-stage Space–Time (ST) switch: working principle In an **ST switch**, a time-multiplexed space stage is followed by a time stage (one TSI on each outgoing highway). ```text HW1 -->+-------------+-->[TSI 1]--> OHW1 HW2 -->| N x N |-->[TSI 2]--> OHW2 ... | space | ... HWN -->| stage (S) |-->[TSI N]--> OHWN +-------------+ ^ CM (S) ^ CM (T) +---- processor -+ ``` Connect caller A (slot $i$ on input highway $a$) to called B (slot $j$ on output highway $b$): 1. **Space stage:** in slot $i$, the S-stage control memory of column $b$ holds $a$, so crosspoint $(a, b)$ closes and the sample of A goes onto the link to TSI $b$, still in slot $i$. 2. **Time stage:** TSI $b$ writes the sample into its speech memory in slot $i$ and, under its control memory, reads it out in slot $j$. 3. The sample now appears in slot $j$ of output highway $b$: A is connected to B. 4. The reverse direction (B → A) is set up the same way, from highway $b$ to highway $a$. **Example:** A in TS5 of HW1, B in TS20 of HW3. In TS5 crosspoint (1, 3) closes; TSI 3 moves the sample from TS5 to TS20. #### Drawbacks of the two-stage ST switch 1. **Single path, high blocking:** the space stage must use the caller's slot $i$. If any other input highway already sends a call to highway $b$ in slot $i$, the link from S to TSI $b$ is busy in slot $i$, and the new call is blocked, even though B and slot $j$ are free. Blocking is about the occupancy of that link, $P_B \approx p$ (e.g. 0.5 at 0.5 E), far worse than the usual grade of service (0.002 to 0.01). 2. **No alternative routing:** the controller has no choice of path, so a single busy link causes loss. 3. **The space stage cannot change slots;** the slot change happens only in the final time stage. 4. **Large exchanges need a big S matrix** and fast TSIs. 5. Same type of problem in **TS** switches, where the space stage must use the output slot $j$. ```text New call: HW2 slot i -> HW3 slot k Link S->TSI3 already used in slot i by HW1 -> BLOCKED (no other path) ``` #### Solving the drawbacks The cure is to add a third stage so each call has many alternative paths. **1. STS switch (Space–Time–Space)** ```text HW -->[S: N x k]-->[TSI 1..k]-->[S: k x N]--> HW ``` - In slot $i$ the input space stage can send the sample to any of $k$ centre TSIs that is free in slot $i$; the TSI changes $i \to j$; in slot $j$ the output space stage sends it to highway $b$. - Paths = $k$: $P_B = [1-(1-p')^2]^k$, $p' = pN/k$; non-blocking if $k \ge 2N - 1$. **2. TST switch (Time–Space–Time)** ```text HW -->[TSI: i -> x]-->[S in slot x]-->[TSI: x -> j]--> HW ``` - The input TSI moves the sample to **any free internal slot $x$**; the space stage switches it in slot $x$; the output TSI moves it to slot $j$. - Paths = $l$ internal slots: $P_B = [1-(1-p')^2]^l$, $p' = pc/l$; non-blocking if $l \ge 2c - 1$. **Numerical comparison** ($p = 0.5$, no expansion, $c = l = 32$): - Two-stage ST: $P_B \approx 0.5$ - TST: $P_B = [1 - 0.5^2]^{32} = 0.75^{32} \approx 1.0 \times 10^{-4}$ **3. Why TST is chosen in practice** - Time expansion (more internal slots) needs only faster memory; space expansion needs more TSIs and crosspoints. - For the same blocking, TST uses less hardware and is easier to control (search for one free internal slot; reverse path at $x + l/2$). - Very large exchanges extend it to **TSST** or **TSSST**, using multistage space stages in the middle. Thus the single-path blocking of ST (and TS) switches is removed by three-stage STS or, preferably, TST structures. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. Logically, what is each output column of a digital space switch? A. A 1:N demultiplexer B. An N:1 multiplexer whose select lines come from its control memory C. A speech memory of c words D. A slot counter Answer: B. A decoder driven by the CM word enables one gate, so only one of the N inputs reaches the output in that slot. (Key point: Space switch column as multiplexer) 2. In an ST switch, A is in slot i of highway a, B in slot j of highway b. What happens? A. The TSI changes slot first, then the space stage uses slot j B. Crosspoint (a,b) closes in slot i, and TSI b then moves the sample from slot i to slot j C. Crosspoint (a,b) closes in slot j and TSI a moves slot i to j D. The sample goes through all TSIs in turn Answer: B. The S stage works in the caller's slot i, sending the sample to TSI b. TSI b writes it in slot i and reads it out in slot j. (Key point: ST working) 3. Why is a new call blocked in an ST switch even though B and slot j are free? A. The TSI memory is full B. The link from S stage to TSI b is already busy in slot i from another input highway C. Slot j is used on the input highway D. The control memory cannot be written Answer: B. There is only one path, and the S stage must use slot i. If another call already uses that link in slot i, there is no alternative, so P_B is about p. (Key point: Cause of ST blocking) 4. Which numerical result shows TST improves on two-stage ST (p = 0.5, c = l = 32)? A. ST gives about 1e-4 and TST about 0.5 B. ST gives about 0.5 and TST gives 0.75^32, about 1e-4 C. Both give about 0.5 D. Both give about 1e-4 Answer: B. Two-stage ST has one path so P_B is about p = 0.5. TST has 32 paths: [1-0.5^2]^32 = 0.75^32, about 1e-4. (Key point: Cure for the drawback) ## Related in Telecommunications - [Time and space switch drawbacks](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-space-switch-drawbacks) — Telecommunications, chapter 4 - [Time switch and two-stage T-S network](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-switch-two-stage-ts) — Telecommunications, chapter 4 - [Time division switching and space switch](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-division-space-switch) — Telecommunications, chapter 4 - [Three-stage combination switch](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Acombination-switch-3-stage) — Telecommunications, chapter 4 - [Space switch and why TST is used](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-switch-why-tst) — Telecommunications, chapter 4 - [Space switch design with connection memory](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-switch-connection-memory) — Telecommunications, chapter 4 ## Related in other subjects - [Two balls impact e = 0.67; work-energy principle](https://www.bctengineer.com/question.md?key=semester_3%2Fapplied_mechanics_dynamics%3Atwo-balls-e067-work-energy) — Applied Mechanics (Dynamics), chapter 2 - [State space model of a two-stage RC circuit](https://www.bctengineer.com/question.md?key=semester_3%2Fcontrol_systems%3Ass-model-rc-two-stage) — Control Systems, chapter 8 - [Problem space; BASE+BALL=GAMES](https://www.bctengineer.com/question.md?key=semester_6%2Fartificial_intelligence%3Aproblem-space-base-ball-games) — Artificial Intelligence, chapter 2 - [Two proportions: mothers working full-time](https://www.bctengineer.com/question.md?key=semester_5%2Fprobability_and_statistics%3Aday-care-working-mothers-proportion) — Probability and Statistics, chapter 7