---
title: "Derive STS and TST blocking probabilities"
subject: "Telecommunications"
chapter: 4
key: "semester_8/telecommunications:sts-tst-blocking-derivation"
source: https://www.bctengineer.com/q/semester_8/telecommunications/sts-tst-blocking-derivation
site: BCT Engineering
---

# Derive STS and TST blocking probabilities

Telecommunications · Chapter 4: Digital Switching

- Asked in: 2080 Baisakh, 6 marks
- Video: [Numericals on ST, TS, TST, and STS Switches || Electronic Switching || In Hindi || By TechLecture](https://www.youtube.com/watch?v=FhFlR8efoGQ) — TECH LECTURE
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_8/telecommunications/sts-tst-blocking-derivation
- Whole chapter: https://www.bctengineer.com/md/semester_8/telecommunications/chapter-4

## Question

Derive expressions for the blocking probability of both STS and TST switches. Show that the blocking probability of a TST switch is lower than that of a STS switch.

## Short answer

Using Lee graphs, STS blocking probability is P_B = [1−(1−p')^2]^k, with p' = p/β and k centre TSIs; TST is P_B = [1−(1−p')^2]^l, with p' = p/α and l internal time slots. TST gives much lower blocking because l (typically 32–1024) far exceeds k, and raising l by faster memory is cheaper than adding hardware.

## Answer

Blocking probability of multistage switches is found with **Lee graphs**: each path is drawn as links in series, parallel paths are independent, and each link is busy with probability $p'$.

#### STS switch
$N$ incoming TDM links enter an $N \times k$ space stage, then $k$ centre-stage TSIs, then a $k \times N$ space stage.

```text
 A o---(k parallel paths, each = 2 links)---o B
        input S -> TSI_i -> output S
```

- Each path uses two internal links in series: input S → TSI and TSI → output S.
- If $p$ is the occupancy of external links, the internal link occupancy is
$$
p' = \frac{p}{\beta}, \quad \beta = \frac{k}{N} \text{ (space expansion)}
$$
- A path is free only if both links are free: probability $(1-p')^2$. Path busy: $1-(1-p')^2$.
- There are $k$ parallel paths (one per centre TSI); the call is blocked only if all are busy:
$$
P_{B,STS} = \left[1 - (1 - p')^2\right]^{k}
$$

#### TST switch
$N$ incoming links, each with $c$ slots, go to input TSIs; a time-multiplexed space stage with $l$ internal time slots; then output TSIs.

- The alternative paths are the $l$ internal time slots of the space stage. Each path uses two links: input TSI → S (in slot $x$) and S → output TSI (in slot $x$).
- Internal link occupancy:
$$
p' = \frac{p}{\alpha}, \quad \alpha = \frac{l}{c} \text{ (time expansion)}
$$
- Same Lee graph with $l$ parallel paths:
$$
P_{B,TST} = \left[1 - (1 - p')^2\right]^{l}
$$

#### Why TST has lower blocking
The expressions have the same form; the blocking depends on the number of parallel paths (the exponent) and $p'$.
1. In STS the exponent is $k$, the number of centre TSIs. Each extra path needs a whole TSI and adds crosspoints to both space stages ($2Nk$), so $k$ stays small.
2. In TST the exponent is $l$, the number of internal time slots. It is equal to or greater than the frame size $c$ (32 to 1024 in practice) and is raised just by running the space stage and memories faster, which is cheap.
3. So for a practical size, $l \gg k$ and the TST result is far smaller.

**Example:** $p = 0.7$ E, no expansion ($p' = 0.7$), $1-(1-0.7)^2 = 0.91$:
- STS with $N = k = 16$ links: $P_B = 0.91^{16} = 0.221$
- TST with $c = l = 32$ slots: $P_B = 0.91^{32} = 0.0489$
- TST with time expansion $l = 64$ ($p' = 0.35$): $P_B = 0.5775^{64} \approx 5.5 \times 10^{-16}$

Hence TST gives lower blocking at lower cost, which is why large digital exchanges use TST (or TSST/TSSST) structures.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. In the STS Lee graph, what is the probability that one path (two links in series) is busy?
   A. p'^2
   B. 1 - (1 - p')^2
   C. (1 - p')^2
   D. 2p'
   Answer: B. The path is free only if both links are free, with probability (1-p')^2, so it is busy with 1-(1-p')^2. (Key point: Lee graph path)

2. The blocking probability of a TST switch is
   A. [1-(1-p')^2]^l
   B. [1-(1-p')^2]^c
   C. 1-(1-p')^l
   D. (p')^(2l)
   Answer: A. The call is blocked only if all l parallel paths (internal slots) are busy. (Key point: Blocking expression)

3. In TST, how is the internal link occupancy p' related to external occupancy p?
   A. p' = p x alpha
   B. p' = p / alpha, alpha = l/c
   C. p' = p + alpha
   D. p' = p
   Answer: B. Time expansion alpha = l/c spreads the traffic over more internal slots, lowering the occupancy. (Key point: Internal occupancy)

4. Why is TST blocking usually lower than STS?
   A. Its exponent l (internal slots) can be made much larger than k cheaply by faster memory
   B. It has fewer paths
   C. It uses fewer TSIs
   D. It has no space stage
   Answer: A. Each extra STS path needs a whole TSI and crosspoints, whereas extra TST paths just need faster memory, so l >> k. (Key point: Why TST is lower)

## Related in Telecommunications

- [Clos network and STS/TST blocking](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aclos-network-sts-tst-blocking) — Telecommunications, chapter 4
- [Space and time switches; STS vs TST](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-time-switch-sts-tst) — Telecommunications, chapter 4
- [Multistage switching; TST vs STS](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Amultistage-tst-sts-compare) — Telecommunications, chapter 4
- [TST time slots for non-blocking operation](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atst-time-slots-numerical) — Telecommunications, chapter 4
- [Short note: TST and STS](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Ashort-note-tst-sts) — Telecommunications, chapter 4
- [Multistage switching and STS blocking](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Amultistage-sts-blocking) — Telecommunications, chapter 4