--- title: "Time and space switch drawbacks" subject: "Telecommunications" chapter: 4 key: "semester_8/telecommunications:time-space-switch-drawbacks" source: https://www.bctengineer.com/q/semester_8/telecommunications/time-space-switch-drawbacks site: BCT Engineering --- # Time and space switch drawbacks Telecommunications · Chapter 4: Digital Switching - Asked in: 2068 Bhadra (old course), 5+5+4 marks - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_8/telecommunications/time-space-switch-drawbacks - Whole chapter: https://www.bctengineer.com/md/semester_8/telecommunications/chapter-4 ## Question Explain the working principle of time switch and space switch used in digital telephone exchange. What are their drawbacks and how are they solved? Explain. ## Short answer Time switch interchanges time slots via speech and control memories; space switch connects input to output highways in the same slot using a gate matrix. Time switch is limited by memory speed and single highway; space switch cannot change slots. Combining T and S stages, especially TST/STS with alternative paths, solves these drawbacks. ## Answer #### Time switch (T) A **time switch** or **Time Slot Interchanger (TSI)** changes the time slot of PCM samples on a TDM highway. ```text in ---->[ Speech memory (c x 8 bits) ]----> out ^ write addr read addr ^ [slot counter] [Control memory] ``` - **Speech memory (SM):** $c$ words of 8 bits, one per slot. **Control memory (CM):** $c$ words of $\log_2 c$ bits. - **Sequential write, random read:** sample in slot $i$ is written to SM($i$); in output slot $j$, CM($j$) = $i$ gives the read address. So input slot $i$ appears in output slot $j$. - **Random write, sequential read:** CM($i$) = $j$ gives the write address; SM is read in order. - Example: CM(7) = 3 connects TS3 to TS7 with a delay of 4 slots. #### Space switch (S) A **time-multiplexed space switch** connects $N$ input highways to $M$ output highways through a gate matrix. Each output column has a control memory with $c$ words; in slot $t$ the word selects which input is connected to that output. The slot stays the same; only the highway changes. ```text O1 O2 .. OM I1 ---x---x-------x I2 ---x---x-------x IN ---x---x-------x | | | [CM1][CM2]..[CMM] ``` Example: CM$_2$(5) = 3 connects I3 to O2 during slot 5. #### Drawbacks **Time switch** 1. **Size limited by memory speed:** two accesses per slot, so $t_{access} \le 125\ \mu s/2c$. A 50 ns memory allows at most $125\ \mu s/(2 \times 50\ ns) = 1250$ channels, not enough for a large exchange. 2. Works on **one highway only**; it cannot connect different highways. 3. Adds a **delay** of up to one frame (125 µs). **Space switch** 1. **Cannot change time slots:** a caller in slot 3 cannot reach a called party in slot 17. 2. Crosspoints grow as $N \times M$; a big single matrix is costly. 3. Gate speed limits the number of slots. **Two-stage TS or ST combination** - Only one path per connection; the S stage must use a fixed slot ($j$ in TS, $i$ in ST). If that slot is already busy into the output highway, the call is blocked, so blocking is high (about $p$). #### How the drawbacks are solved 1. **Combine T and S:** time stages change slots; space stages change highways. Together they connect any slot on any highway to any slot on any other highway. 2. **Use three stages (TST or STS)** to give many alternative paths: - TST: $l$ internal slots as paths, $P_B = [1-(1-p')^2]^l$, non-blocking for $l \ge 2c - 1$. - STS: $k$ centre TSIs as paths, $P_B = [1-(1-p')^2]^k$, non-blocking for $k \ge 2N - 1$. 3. **Time expansion** in TST (more internal slots than external) reduces blocking cheaply. 4. **Multistage space networks** (Clos, $k \ge 2n - 1$) reduce crosspoints while staying non-blocking. 5. **Larger structures** such as TSST or TSSST for very large exchanges. 6. **Faster memory and parallel (wider) highways** (serial-to-parallel conversion) allow more channels per TSI. **Example:** with $c = l = 32$ and $p = 0.5$, a TST switch has $P_B = 0.75^{32} \approx 1.0 \times 10^{-4}$, compared with about 0.5 for a two-stage TS switch. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. In a time switch with sequential write and random read, CM(7) = 3. What does this mean? A. The sample of slot 7 is output in slot 3 B. The sample of input slot 3 is read out in output slot 7 C. Speech memory has 7 words of 3 bits D. The control memory is read 7 times per frame Answer: B. The sample in slot 3 is written to SM(3); in output slot 7, CM(7)=3 gives the read address, so TS3 appears in TS7 with a delay of 4 slots. (Key point: Time switch operation) 2. What limits the size of a single time switch? A. Number of crosspoints N x M B. Memory access time, since two accesses are needed per slot (t <= 125 us/2c) C. The number of highways it can connect D. Length of the control memory word Answer: B. One write and one read per slot means access time must be at most 125 us/2c. A 50 ns memory then allows only about 1250 channels. (Key point: Time switch size limit) 3. What is a basic drawback of a space switch alone? A. It cannot change time slots, so a caller in slot 3 cannot reach a called party in slot 17 B. It adds a delay of one full frame C. It works on one highway only D. It needs two memory accesses per slot Answer: A. A space switch only changes the highway and keeps the slot. Combining it with time switches solves this. (Key point: Drawback of space switch) 4. How is the high blocking of two-stage TS/ST solved? A. Use a faster speech memory B. Use three-stage TST or STS to give many alternative paths C. Reduce the number of highways to one D. Add delay to the speech samples Answer: B. TST offers l internal slots as paths and STS offers k centre TSIs. Blocking is then P_B = [1-(1-p')^2]^l, far lower than about p for two stages. (Key point: Solving two-stage blocking) ## Related in Telecommunications - [Working principle of a digital telephone exchange](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Adigital-telephone-exchange-principle) — Telecommunications, chapter 4, asked 4× - [Time switch in digital exchange](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-switch-digital-exchange) — Telecommunications, chapter 4 - [Space switch and two-stage S-T drawbacks](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-switch-two-stage-st) — Telecommunications, chapter 4 - [Space switch and why TST is used](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-switch-why-tst) — Telecommunications, chapter 4 - [ST and TS drawbacks solved by STS](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Ast-ts-drawbacks-sts) — Telecommunications, chapter 4 - [Time division switching and space switch](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-division-space-switch) — Telecommunications, chapter 4 ## Related in other subjects - [IPv4 drawbacks solved by IPv6](https://www.bctengineer.com/question.md?key=semester_7%2Fcomputer_networks_and_security%3Aipv4-drawbacks-ipv6-advantages) — Computer Networks and Security, chapter 7, asked 2× - [Time-area method with histogram, drawbacks](https://www.bctengineer.com/question.md?key=semester_5%2Fengineering_hydrology%3Atime-area-method-purpose-drawbacks) — Engineering Hydrology, chapter 7