---
title: "Time switch in digital exchange"
subject: "Telecommunications"
chapter: 4
key: "semester_8/telecommunications:time-switch-digital-exchange"
source: https://www.bctengineer.com/q/semester_8/telecommunications/time-switch-digital-exchange
site: BCT Engineering
---

# Time switch in digital exchange

Telecommunications · Chapter 4: Digital Switching

- Asked in: 2070 Asar, 5 marks
- Video: [Lec-09_Time division Switching system | Telecommunication Engineering | ICT Engineering](https://www.youtube.com/watch?v=OnR0da1RWJM) — Computer_IT_ICT Engineering Department : LJIET
- Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14
- Page: https://www.bctengineer.com/q/semester_8/telecommunications/time-switch-digital-exchange
- Whole chapter: https://www.bctengineer.com/md/semester_8/telecommunications/chapter-4

## Question

What is Time (T) switch used in digital telephone exchange?

## Short answer

A time switch (TSI) interchanges time slots of PCM samples on a TDM highway using speech memory and control memory. In sequential-write random-read mode, an input sample in slot i is written to address i, then read out at slot j using CM, achieving connection in under one frame delay.

## Answer

A **time (T) switch**, or **Time Slot Interchanger (TSI)**, is the part of a digital exchange that moves a PCM sample from one time slot to another on a TDM highway. Since each subscriber occupies a fixed slot, swapping slots connects one subscriber to another.

```text
 in (slots 0..c-1)                  out
 ------->[ Speech memory c x 8 ]------->
          ^ write       read ^
   [counter]          [Control memory]
                       (set by processor)
```

**Parts**
- **Speech memory (SM):** $c$ locations of 8 bits, one per slot.
- **Control memory (CM):** $c$ words of $\log_2 c$ bits giving read or write addresses.
- **Time-slot counter** and control logic.

**Working (sequential write, random read)**
1. The sample in input slot $i$ is written into SM($i$).
2. In output slot $j$, CM($j$) holds $i$, so SM($i$) is read and sent out in slot $j$.
3. Example: CM(7) = 3 connects input TS3 to output TS7, with a delay of 4 slots.

In the other mode (random write, sequential read), CM($i$) gives the write address and SM is read in order.

**Speed limit:** each slot needs a write and a read, so $t_{access} \le 125\ \mu s / 2c$. For $c = 32$ this is 1.95 µs; a 50 ns memory can handle up to $125\ \mu s / (2 \times 50\ ns) = 1250$ channels.

**Features:** non-blocking within its frame, delay under one frame, low cost (just memory). Since it serves only one highway, large exchanges combine T switches with space switches as TST.

## Check yourself

The answer's key points as multiple-choice questions, with the correct option and why.

1. What does a time switch (TSI) do?
   A. Moves a sample from one highway to another
   B. Moves a sample from one time slot to another on a TDM highway
   C. Amplifies PCM
   D. Converts voice to PCM
   Answer: B. It swaps slots, connecting different subscribers. (Key point: Function)

2. In sequential write, random read, how is the sample from input slot i sent out in slot j?
   A. CM(j) holds i, so SM(i) is read in slot j
   B. CM(i) holds j, so SM(j) is written
   C. SM(j) is read in slot i
   D. The counter reads SM(i) in slot i
   Answer: A. Samples are written to SM(i); in output slot j, CM(j) gives the address i to read. (Key point: Working)

3. Which is the speech memory size for c slots?
   A. c locations of 8 bits
   B. log2 c locations of 8 bits
   C. c locations of log2 c bits
   D. 8 locations of c bits
   Answer: A. SM stores one 8-bit sample per slot; CM has the log2 c-bit addresses. (Key point: Parts)

4. Why must t_access be at most 125 us / 2c?
   A. Each slot needs one write and one read
   B. The memory is read twice per frame
   C. Two highways share it
   D. Control memory doubles it
   Answer: A. Per slot, there is both a write and a read within the 125 us / c slot time. For c = 32 this is 1.95 us. (Key point: Speed limit)

## Related in Telecommunications

- [Working principle of a digital telephone exchange](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Adigital-telephone-exchange-principle) — Telecommunications, chapter 4, asked 4×
- [Telephone exchange structure; TST vs STS](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aexchange-structure-tst-sts) — Telecommunications, chapter 4
- [Time and space switch drawbacks](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-space-switch-drawbacks) — Telecommunications, chapter 4
- [Telephone exchange and switching hierarchy](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aexchange-switching-hierarchy) — Telecommunications, chapter 1, asked 3×
- [Digital exchange and three-stage crosspoints](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Adigital-exchange-crosspoints) — Telecommunications, chapter 4
- [Time switch and two-stage T-S network](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-switch-two-stage-ts) — Telecommunications, chapter 4

## Related in other subjects

- [Digital PI design for plant with 2 s dead time](https://www.bctengineer.com/question.md?key=semester_6%2Fdigital_control_system%3Api-design-dead-time-2s) — Digital Control System, chapter 4, asked 3×
- [Optimum filter; Remez exchange expression](https://www.bctengineer.com/question.md?key=semester_7%2Fdigital_signal_analysis_and_processing%3Aoptimum-filter-remez-expression) — Digital Signal Analysis and Processing, chapter 5, asked 5×
- [Remez exchange algorithm with flow chart](https://www.bctengineer.com/question.md?key=semester_7%2Fdigital_signal_analysis_and_processing%3Aremez-flowchart-explain) — Digital Signal Analysis and Processing, chapter 5, asked 4×