--- title: "Time switch and two-stage T-S network" subject: "Telecommunications" chapter: 4 key: "semester_8/telecommunications:time-switch-two-stage-ts" source: https://www.bctengineer.com/q/semester_8/telecommunications/time-switch-two-stage-ts site: BCT Engineering --- # Time switch and two-stage T-S network Telecommunications · Chapter 4: Digital Switching - Asked in: 2064 Poush (old course), 1+4+1+10 marks - Video: [TWO STAGE TS SWITCH unit 2 by RITU SHARMA GPC SIKAR](https://www.youtube.com/watch?v=JWKVwuXXcOE) — GPCSIKAR E-LECTURES - Answer checked by Claude Opus 5.5 (high effort) on 2026-10-14 - Page: https://www.bctengineer.com/q/semester_8/telecommunications/time-switch-two-stage-ts - Whole chapter: https://www.bctengineer.com/md/semester_8/telecommunications/chapter-4 ## Question What is Time (T) Switch? How does it work? Is it possible to make a switching network in a digital exchange with the help of two stage Time-Space (TS) switch? If not, explain why and how this problem is solved. ## Short answer A time switch (TSI) moves PCM samples between time slots using speech and control memories. A two-stage TS is possible but impractical because the space stage must use the called party's slot, giving one path and blocking probability 1-(1-p)^2. Adding a third stage to form TST provides alternative internal slots and solves blocking. ## Answer #### What is a time (T) switch? A **time switch**, or **Time Slot Interchanger (TSI)**, is a digital switch that moves PCM samples from one time slot to another on a TDM highway. Since each subscriber has a fixed slot, interchanging slots connects two subscribers. #### How does it work? ```text TDM in TDM out ------->+------------------------+-------> | Speech memory (SM) | | c words x 8 bits | +------------------------+ write addr ^ ^ read addr +-----------+ +-----------+ | slot |------->| Control | | counter | | memory CM | +-----------+ +-----------+ ^ processor ``` - **Sequential write, random read:** in input slot $i$ the sample is written into SM($i$). In output slot $j$, CM($j$) holds $i$, so SM($i$) is read out in slot $j$. - **Random write, sequential read:** CM($i$) = $j$ gives the write address; SM is read in order, so the sample leaves in slot $j$. - **Example:** to connect TS3 to TS7 (sequential write), set CM(7) = 3. Delay = 4 slots ≈ 15.6 µs (slot = 3.9 µs). - **Timing:** one write and one read per slot, so $t_{access} \le 125\ \mu s / 2c$; for $c = 32$, $t \le 1.95$ µs. #### Is a two-stage TS switch possible? **Partly, but not as a practical exchange network.** A TS switch can be built and it will work at very light load, but it suffers from heavy **blocking**, so it cannot give an acceptable grade of service. ```text HW1 -->[TSI 1]--+-----------+--> OHW1 HW2 -->[TSI 2]--| N x N |--> OHW2 ... | space S | ... HWN -->[TSI N]--+-----------+--> OHWN ``` **Working of TS:** to connect A (slot $i$, highway $a$) to B (slot $j$, highway $b$): 1. TSI $a$ moves A's sample from slot $i$ to slot $j$ (the slot B needs). 2. In slot $j$ the space stage closes crosspoint $(a, b)$, sending the sample to highway $b$. #### Why the TS switch is not suitable 1. **Single fixed path:** the space stage must use slot $j$, the called party's slot. If another input highway is already sending a call to highway $b$ in slot $j$, the crosspoint column for $b$ is busy in slot $j$, and the new call is blocked, even though A and B are free. 2. Also, if slot $j$ on the output of TSI $a$ is already used by another call from highway $a$ (to a different output highway), the call is blocked. 3. The blocking probability is roughly the chance that one of these links is busy: with link occupancy $p$, $$ P_B = 1 - (1 - p)^2 $$ For $p = 0.5$: $P_B = 0.75$; for $p = 0.2$: $P_B = 0.36$. Telephone networks need $P_B$ of about 0.002 to 0.01. 4. There is no alternative path, so path search cannot help. 5. The same problem exists in the **ST** switch, where the space stage must use the caller's slot $i$. ```text Call 1: HW1 -> HW3 using slot 7 (S busy: col 3, slot 7) Call 2: HW2 -> HW3, B is in slot 7 -> BLOCKED ``` #### How the problem is solved **Add a third stage to create alternative paths: TST (or STS).** ```text HWa->[TSI-A: i->x]->[S: a->b in x]->[TSI-B: x->j]->HWb ``` 1. **Input T stage:** moves the sample from slot $i$ to **any free internal slot $x$**, not just slot $j$. 2. **Space stage:** in slot $x$ connects highway $a$ to highway $b$. 3. **Output T stage:** moves the sample from slot $x$ to the wanted slot $j$. 4. The controller can choose among $l$ internal slots, so the call is blocked only if all $l$ are unusable. **Blocking with Lee graph** ($l$ parallel paths, two links each, $p' = pc/l$): $$ P_B = \left[1 - (1 - p')^2\right]^{l} $$ **Example:** $c = l = 32$, $p = 0.5$: $$ P_B = (1 - 0.25)^{32} = 0.75^{32} \approx 1.0 \times 10^{-4} $$ compared with $0.75$ for the TS switch. **Non-blocking TST:** with time expansion $l \ge 2c - 1$ (e.g. 64 internal slots for 32-slot links), no internal blocking at all. **Other solutions** - **STS:** space stages outside and $k$ TSIs in the middle; $k$ alternative paths; non-blocking if $k \ge 2N - 1$. It needs more hardware than TST. - **TSST / TSSST:** for very large exchanges, the middle space stage is made multistage (Clos), keeping crosspoints low. | Network | Paths per call | Blocking at $p = 0.5$, 32 slots | |---|---|---| | T only | Not between highways | — | | TS / ST | 1 | ≈ 0.75 | | TST | 32 | ≈ $1.0 \times 10^{-4}$ | | TST, $l = 63$ | 63 | 0 (non-blocking) | Hence digital exchanges use TST (time–space–time) networks rather than two-stage TS switches. ## Check yourself The answer's key points as multiple-choice questions, with the correct option and why. 1. A TSI with sequential write connects TS3 to TS7 using CM(7) = 3. What is the delay? A. 3 slots B. 4 slots, about 15.6 us for 3.9 us slots C. 7 slots D. One full frame of 125 us Answer: B. The sample waits from slot 3 to slot 7, i.e. 4 slots; 4 x 3.9 us is about 15.6 us. (Key point: Time switch delay) 2. Why is a two-stage TS switch not practical for an exchange network? A. It cannot change time slots B. It has a single fixed path, so the S stage must use slot j and blocking is very high C. It needs no space stage D. It requires slower memory Answer: B. The space stage must use the called party's slot j; if that crosspoint column is busy in slot j, the call is blocked with no alternative path. (Key point: Why TS is unsuitable) 3. How does TST remove the blocking problem? A. The input T stage moves the sample to any free internal slot x, S works in x, output T moves it to slot j B. The space stage is removed C. The output T stage chooses the highway D. Samples are sent twice in slot j Answer: A. With l internal slots as alternatives, a call blocks only if all l are unusable. Non-blocking needs l >= 2c - 1. (Key point: TST path choice) ## Related in Telecommunications - [Space switch and two-stage S-T drawbacks](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Aspace-switch-two-stage-st) — Telecommunications, chapter 4 - [Time switch in digital exchange](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-switch-digital-exchange) — Telecommunications, chapter 4 - [Time division switching and space switch](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-division-space-switch) — Telecommunications, chapter 4 - [Time and space switch drawbacks](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Atime-space-switch-drawbacks) — Telecommunications, chapter 4 - [Digital exchange and three-stage crosspoints](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Adigital-exchange-crosspoints) — Telecommunications, chapter 4 - [Digital exchange principles; non-blocking 3-stage](https://www.bctengineer.com/question.md?key=semester_8%2Ftelecommunications%3Adigital-exchange-nonblocking-3-stage) — Telecommunications, chapter 4 ## Related in other subjects - [State space model of a two-stage RC circuit](https://www.bctengineer.com/question.md?key=semester_3%2Fcontrol_systems%3Ass-model-rc-two-stage) — Control Systems, chapter 8 - [Spiral curve not possible, 10 deg 50 min deviation](https://www.bctengineer.com/question.md?key=semester_6%2Ftransportation_engineering_i%3An-65k-spiral-check) — Transportation Engineering I, chapter 3 - [Compare switch and if-else-if ladder](https://www.bctengineer.com/question.md?key=semester_1%2Fcomputer_programming%3Aswitch-vs-ifelse-ladder) — Computer Programming, chapter 5, asked 2× - [Crossbar switch vs multistage network](https://www.bctengineer.com/question.md?key=semester_5%2Fcomputer_organization_and_architecture%3Acrossbar-vs-multistage) — Computer Organization and Architecture, chapter 8