Hazard types and hazard cover in K-maps

A hazard is an unwanted momentary pulse (glitch) at the output of a combinational circuit, caused by unequal propagation delays along different paths when an input changes. The steady-state output is correct, but the transient is wrong; in sequential systems such glitches can trigger flip-flops falsely.

Types of hazards

• Static hazard: the output should not change, but it briefly changes and returns.
• Dynamic hazard: the output should change once but changes several times, because the changing input reaches the output by three or more paths of different delay.

Hazard cover in K-maps (example)

$$F = AB + \overline{A}C$$

        BC
A      00  01  11  10
     +---+---+---+---+
 0   | 0 | 1 | 1 | 0 |   A'C  = cells 1, 3
     +---+---+---+---+
 1   | 0 | 0 | 1 | 1 |   AB   = cells 7, 6
     +---+---+---+---+

Cells 3 (011) and 7 (111) are adjacent 1s but lie in different groups. With $B = C = 1$, F should stay 1 while A changes. When A goes $1 \to 0$, the term $AB$ falls at once but $\overline{A}C$ rises only after the inverter delay, so F momentarily becomes 0: a static-1 hazard.

Hazard cover technique: add a redundant group that covers every pair of adjacent 1s not already in a common group. Here the extra group is cells 3 and 7, i.e. the consensus term $BC$:

$$F = AB + \overline{A}C + BC$$

While A changes with $B = C = 1$, $BC = 1$ keeps F at 1, so the glitch disappears. The function is unchanged (consensus theorem: $AB + \overline{A}C + BC = AB + \overline{A}C$), only the circuit gains one gate.

Rules

1. For SOP circuits: every two adjacent 1-cells must be covered by at least one common prime implicant (removes static-1 hazards).
2. For POS circuits: every two adjacent 0-cells must be covered by a common sum term (removes static-0 hazards).
3. A two-level circuit built with full hazard cover is also free of dynamic hazards; dynamic hazards are avoided by not using multi-level paths for the same variable.